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AT28C010_06 PDF预览

AT28C010_06

更新时间: 2024-11-24 06:38:19
品牌 Logo 应用领域
爱特美尔 - ATMEL 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
17页 395K
描述
1-megabit (128K x 8) Paged Parallel EEPROM

AT28C010_06 数据手册

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Features  
Fast Read Access Time – 120 ns  
Automatic Page Write Operation  
– Internal Address and Data Latches for 128 Bytes  
– Internal Control Timer  
Fast Write Cycle Time  
– Page Write Cycle Time – 10 ms Maximum  
– 1 to 128-byte Page Write Operation  
Low Power Dissipation  
1-megabit  
(128K x 8)  
Paged Parallel  
EEPROM  
– 40 mA Active Current  
– 200 µA CMOS Standby Current  
Hardware and Software Data Protection  
DATA Polling for End of Write Detection  
High Reliability CMOS Technology  
– Endurance: 104 or 105 Cycles  
– Data Retention: 10 Years  
Single 5V 10% Supply  
CMOS and TTL Compatible Inputs and Outputs  
JEDEC Approved Byte-wide Pinout  
Industrial Temperature Ranges  
Green (Pb/Halide-free) Packaging Option  
AT28C010  
1. Description  
The AT28C010 is a high-performance electrically-erasable and programmable read-  
only memory. Its 1 megabit of memory is organized as 131,072 words by 8 bits. Man-  
ufactured with Atmel’s advanced nonvolatile CMOS technology, the device offers  
access times to 120 ns with power dissipation of just 220 mW. When the device is  
deselected, the CMOS standby current is less than 200 µA.  
The AT28C010 is accessed like a Static RAM for the read or write cycle without the  
need for external components. The device contains a 128-byte page register to allow  
writing of up to 128 bytes simultaneously. During a write cycle, the address and 1 to  
128 bytes of data are internally latched, freeing the address and data bus for other  
operations. Following the initiation of a write cycle, the device will automatically write  
the latched data using an internal control timer. The end of a write cycle can be  
detected by DATA polling of I/O7. Once the end of a write cycle has been detected a  
new access for a read or write can begin.  
Atmel’s AT28C010 has additional features to ensure high quality and manufacturabil-  
ity. The device utilizes internal error correction for extended endurance and improved  
data retention characteristics. An optional software data protection mechanism is  
available to guard against inadvertent writes. The device also includes an extra  
128 bytes of EEPROM for device identification or tracking.  
0353G–PEEPR–10/06  

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