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AT27LV520-90XJ PDF预览

AT27LV520-90XJ

更新时间: 2024-11-28 13:05:43
品牌 Logo 应用领域
爱特美尔 - ATMEL 可编程只读存储器电动程控只读存储器
页数 文件大小 规格书
10页 133K
描述
OTP ROM, 64KX8, 90ns, CMOS, PDSO20, 4.40 MM, PLASTIC, MO-153AC, TSSOP-20

AT27LV520-90XJ 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP,
针数:20Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.32.00.71
风险等级:5.78最长访问时间:90 ns
其他特性:ALSO OPERATES AT 5V SUPPLYJESD-30 代码:R-PDSO-G20
JESD-609代码:e3长度:6.5 mm
内存密度:524288 bit内存集成电路类型:OTP ROM
内存宽度:8湿度敏感等级:2
功能数量:1端子数量:20
字数:65536 words字数代码:64000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:64KX8
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
并行/串行:PARALLEL峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:4.4 mm
Base Number Matches:1

AT27LV520-90XJ 数据手册

 浏览型号AT27LV520-90XJ的Datasheet PDF文件第2页浏览型号AT27LV520-90XJ的Datasheet PDF文件第3页浏览型号AT27LV520-90XJ的Datasheet PDF文件第4页浏览型号AT27LV520-90XJ的Datasheet PDF文件第5页浏览型号AT27LV520-90XJ的Datasheet PDF文件第6页浏览型号AT27LV520-90XJ的Datasheet PDF文件第7页 
Features  
8-Bit Multiplexed Addresses/Outputs  
Fast Read Access Time - 90 ns  
Dual Voltage Range Operation  
– Low-Voltage Power Supply Range, 3.0V to 3.6V, or  
– Standard 5V ± 10% Supply Range  
Low Power CMOS Operation  
– 20 µA max. Standby for ALE = VIH and VCC = 3.6V  
– 29 mW max. Active at 5 MHz for VCC = 3.6V  
20-Lead TSSOP Package  
High Reliability CMOS Technology  
– 2,000V ESD Protection  
512K (64K x 8)  
Multiplexed  
Addresses/  
Outputs  
– 200 mA Latchup Immunity  
RapidProgramming Algorithm - 50 µs/byte (typical)  
CMOS and TTL Compatible Inputs and Outputs  
– JEDEC Standard for LVTTL  
Integrated Product Identification Code  
Commercial and Industrial Temperature Range  
Low Voltage  
OTP EPROM  
Description  
The AT27LV520 is a low-power, high-performance 524,288-bit one-time programma-  
ble read only memory (OTP EPROM) organized 64K by 8 bits. It incorporates latches  
for the 8 lower order address bits to multiplex with the 8 data bits. This minimizes sys-  
tem chip count, reduces cost, and simplifies the design of multiplexed bus systems. It  
requires only one power supply in the range of 3.0V to 3.6V for normal read mode  
operation, making it ideal for fast, portable systems using battery power. Any byte can  
be accessed in less than 90 ns.  
AT27LV520  
The AT27LV520 is available in 173 mil, 20-pin TSSOP, 300 mil, 20-pin SOIC and 28-  
pin TSOP, one-time programmable (OTP) plastic packages.  
(continued)  
Pin Configurations  
TSSOP Top View  
Pin Name Function  
A10  
A12  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
A8  
A8 - A15  
Addresses  
AD1  
AD3  
AD5  
AD7  
GND  
AD6  
AD4  
AD2  
AD0  
A14  
AD0 - AD7 Addresses/Outputs  
ALE  
VCC  
OE/VPP  
A15  
OE /VPP  
ALE  
Output Enable/VPP  
A13  
Address Latch Enable  
A11  
A9  
TSOP Top View  
A10  
NC  
22  
23  
24  
25  
26  
27  
21  
A8  
SOIC Top View  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
10  
9
NC  
NC  
NC  
A12  
A14  
ALE  
VCC  
OE/VPP  
A15  
A13  
A11  
NC  
AD1  
AD3  
AD5  
AD7  
GND  
AD6  
AD4  
AD2  
NC  
OE/VPP  
A15  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
VCC  
ALE  
A14  
A12  
A10  
A8  
A13  
28  
1
A11  
A9  
2
3
4
5
6
7
AD0  
AD2  
AD4  
AD6  
GND  
AD1  
AD3  
AD5  
AD7  
NC  
NC  
A9  
8
AD0  
Rev. 0911B-B–01/98  

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