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AT25040N-10SI-2.7 PDF预览

AT25040N-10SI-2.7

更新时间: 2024-11-19 22:15:07
品牌 Logo 应用领域
爱特美尔 - ATMEL 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
15页 168K
描述
SPI Serial EEPROMs

AT25040N-10SI-2.7 数据手册

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Features  
Serial Peripheral Interface (SPI) Compatible  
Supports SPI Modes 0(0,0) and 3(1,1)  
Low-Voltage and Standard-Voltage Operation  
– 5.0 (VCC = 4.5V to 5.5V)  
– 2.7 (VCC = 2.7V to 5.5V)  
– 1.8 (VCC = 1.8V to 3.6V)  
2.1 MHz Clock Rate (5V) Compatibility  
8-Byte Page Mode  
Block Write Protection  
– Protect 1/4, 1/2, or Entire Array  
Write Protect (WP) Pin and Write Disable Instructions for  
Both Hardware and Software Data Protection  
Self-Timed Write Cycle (10 ms Max)  
High Reliability  
SPI Serial  
EEPROMs  
1K (128 x 8)  
– Endurance: 1 Million Write Cycles  
– Data Retention: 100 Years  
– ESD Protection: >4000V  
Automotive Grade and Extended Temperature Devices Available  
8-Pin PDIP and JEDEC SOIC Packages  
2K (256 x 8)  
4K (512 x 8)  
Description  
The AT25010/020/040 provides 1024/2048/4096 bits of serial electrically erasable  
programmable read only memory (EEPROM) organized as 128/256/512 words of 8  
bits each. The device is optimized for use in many industrial and commercial applica-  
tions where low power and low voltage operation are essential. The AT25010/020/040  
is available in space saving 8-pin PDIP and 8-pin JEDEC (SOIC) packages.  
AT25010  
AT25020  
AT25040  
The AT25010/020/040 is enabled through the Chip Select pin (CS) and accessed via  
a 3-wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and  
Serial Clock (SCK). All programming cycles are completely self-timed, and no sepa-  
rate ERASE cycle is required before WRITE.  
BLOCK WRITE protection is enabled by programming the status register with one of  
four blocks of write protection. Separate program enable and program disable instruc-  
tions are provided for additional data protection. Hardware data protection is provided  
via the WP pin to protect against inadvertent write attempts. The HOLD pin may be  
used to suspend any serial communication without resetting the serial sequence.  
SPI, 1K Serial  
E2PROM  
Pin Configurations  
8-Pin PDIP  
Pin Name Function  
CS  
Chip Select  
CS  
SO  
1
2
3
4
8
7
6
5
VCC  
HOLD  
SCK  
SI  
SCK  
SI  
Serial Data Clock  
Serial Data Input  
Serial Data Output  
Ground  
WP  
GND  
SO  
GND  
VCC  
WP  
8-Pin SOIC  
Power Supply  
Write Protect  
CS  
SO  
WP  
1
8
7
6
5
VCC  
HOLD  
SCK  
SI  
2
3
4
HOLD  
Suspends Serial Input  
GND  
Rev. 0606E–08/98  

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