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AT24C512W1-10SI-2.7 PDF预览

AT24C512W1-10SI-2.7

更新时间: 2024-11-22 22:08:55
品牌 Logo 应用领域
爱特美尔 - ATMEL 存储内存集成电路光电二极管双倍数据速率异步传输模式ATM可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
页数 文件大小 规格书
12页 244K
描述
2-wire Serial EEPROM

AT24C512W1-10SI-2.7 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP20,.4
针数:20Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.51
风险等级:5.76Is Samacsys:N
最大时钟频率 (fCLK):5 MHz数据保留时间-最小值:40
耐久性:100000 Write/Erase CyclesI2C控制字节:10100DDR
JESD-30 代码:R-PDSO-G20JESD-609代码:e0
长度:12.8 mm内存密度:524288 bit
内存集成电路类型:EEPROM内存宽度:8
功能数量:1端子数量:20
字数:65536 words字数代码:64000
工作模式:SYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:64KX8
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP20,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE并行/串行:SERIAL
峰值回流温度(摄氏度):NOT SPECIFIED电源:3/5 V
认证状态:Not Qualified座面最大高度:2.65 mm
串行总线类型:I2C最大待机电流:6e-7 A
子类别:EEPROMs最大压摆率:0.003 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.5 mm
最长写入周期时间 (tWC):10 ms写保护:HARDWARE
Base Number Matches:1

AT24C512W1-10SI-2.7 数据手册

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Features  
Low-voltage and Standard-voltage Operation  
– 5.0 (VCC = 4.5V to 5.5V)  
– 2.7 (VCC = 2.7V to 5.5V)  
– 1.8 (VCC = 1.8V to 3.6V)  
Internally Organized 65,536 x 8  
2-wire Serial Interface  
Schmitt Triggers, Filtered Inputs for Noise Suppression  
Bidirectional Data Transfer Protocol  
1 MHz (5V), 400 kHz (2.7V) and 100 kHz (1.8V) Compatibility  
Write Protect Pin for Hardware and Software Data Protection  
128-byte Page Write Mode (Partial Page Writes Allowed)  
Self-timed Write Cycle (5 ms Typical)  
High Reliability  
2-wire Serial  
EEPROM  
Endurance: 100,000 Write Cycles  
512K (65,536 x 8)  
Data Retention: 40 Years  
ESD Protection: >4000V  
Automotive Grade and Extended Temperature Devices Available  
8-pin PDIP and 20-pin JEDEC SOIC, 8-pin LAP, and 8-ball dBGATM Packages  
AT24C512  
Description  
The AT24C512 provides 524,288 bits of serial electrically erasable and programmable  
read only memory (EEPROM) organized as 65,536 words of 8 bits each. The devices  
cascadable feature allows up to 4 devices to share a common 2-wire bus. The device  
is optimized for use in many industrial and commercial applications where low-power  
and low-voltage operation are essential. The devices are available in space-saving  
8-pin PDIP, 20-pin JEDEC SOIC, 8-pin Leadless Array (LAP), and 8-ball dBGA pack-  
ages. In addition, the entire family is available in 5.0V (4.5V to 5.5V), 2.7V (2.7V to  
5.5V) and 1.8V (1.8V to 3.6V) versions.  
8-pin PDIP  
Pin Configurations  
Pin Name  
A0 - A1  
SDA  
Function  
A0  
A1  
1
2
3
4
8
7
6
5
VCC  
WP  
Address Inputs  
Serial Data  
NC  
SCL  
SDA  
GND  
SCL  
Serial Clock Input  
Write Protect  
No Connect  
WP  
8-pin Leadless Array  
NC  
VCC  
WP  
8
7
6
5
1
2
3
4
A0  
A1  
20-pin SOIC  
SCL  
SDA  
NC  
GND  
A0  
A1  
1
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
VCC  
WP  
NC  
Bottom View  
8-ball dBGA  
2
NC  
NC  
NC  
NC  
NC  
NC  
NC  
GND  
3
4
NC  
5
NC  
8
7
6
5
1
2
3
4
A0  
VCC  
6
NC  
A1  
WP  
SCL  
SDA  
7
NC  
NC  
8
NC  
GND  
9
SCL  
SDA  
10  
Bottom View  
Rev. 1116D07/00  

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