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AT24C512B

更新时间： 2024-11-29 04:49:43
品牌 Logo 应用领域
爱特美尔 - ATMEL 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
18页 350K
描述
Two-wire Serial EEPROM 512K (65,536 x 8) with Three Device Address Inputs

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中文翻译

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AT24C512B 数据手册

 浏览型号AT24C512B的Datasheet PDF文件第2页浏览型号AT24C512B的Datasheet PDF文件第3页浏览型号AT24C512B的Datasheet PDF文件第4页浏览型号AT24C512B的Datasheet PDF文件第5页浏览型号AT24C512B的Datasheet PDF文件第6页浏览型号AT24C512B的Datasheet PDF文件第7页 
Features  
• Low-voltage and Standard-voltage Operation  
– 1.8 (VCC = 1.8V to 3.6V)  
• Internally Organized 65,536 x 8  
• Two-wire Serial Interface  
• Schmitt Triggers, Filtered Inputs for Noise Suppression  
• Bidirectional Data Transfer Protocol  
• 1 MHz (3.6V), 400 kHz (1.8V) Compatibility  
• Write Protect Pin for Hardware and Software Data Protection  
• 128-byte Page Write Mode (Partial Page Writes Allowed)  
• Self-timed Write Cycle (5 ms Max)  
Two-wire Serial  
EEPROM  
• High Reliability  
– Endurance: 1,000,000 Write Cycles  
– Data Retention: 40 Years  
• Lead-free/Halogen-free Devices Available  
• 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead TSSOP,  
8-lead LAP and 8-lead SAP Packages  
• Die Sales: Wafer Form, Waffle Pack and Bumped Die  
512K (65,536 x 8)  
AT24C512B  
with Three Device  
Address Inputs  
Description  
The AT24C512B provides 524,288 bits of serial electrically erasable and programma-  
ble read only memory (EEPROM) organized as 65,536 words of 8 bits each. The  
device’s cascadable feature allows up to four devices to share a common two-wire  
bus. The device is optimized for use in many industrial and commercial applications  
where low-power and low-voltage operation are essential. The devices are available in  
space-saving 8-pin PDIP, 8-lead JEDEC SOIC, 8-lead TSSOP, 8-lead Leadless Array  
(LAP), and 8-lead SAP packages. In addition, the entire family is available in a 1.8V  
(1.8V to 3.6V) version.  
Preliminary  
8-lead PDIP  
Table 1. Pin Configurations  
8-lead TSSOP  
Pin Name  
A0–A2  
SDA  
Function  
A0  
A1  
1
2
3
4
8
7
6
5
VCC  
WP  
A0  
A1  
1
2
3
4
8
7
6
5
VCC  
WP  
Address Inputs  
Serial Data  
A2  
SCL  
SDA  
A2  
SCL  
SDA  
GND  
GND  
SCL  
Serial Clock Input  
Write Protect  
No Connect  
8-lead SOIC  
WP  
NC  
A0  
A1  
1
2
3
4
8
7
6
5
VCC  
WP  
A2  
SCL  
SDA  
GND  
8-lead Leadless Array  
8-lead SAP  
VCC  
WP  
8
7
6
5
1
2
3
4
A0  
VCC  
WP  
8
7
6
5
1
2
3
4
A0  
A1  
A1  
SCL  
SDA  
A2  
SCL  
SDA  
A2  
GND  
GND  
Bottom View  
Bottom View  
Rev. 5112A–SEEPR–8/05  
1234567...18

中文翻译

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