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AT24C256CW-SH-B PDF预览

AT24C256CW-SH-B

更新时间: 2024-10-01 06:38:19
品牌 Logo 应用领域
爱特美尔 - ATMEL 存储内存集成电路光电二极管双倍数据速率可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
页数 文件大小 规格书
23页 436K
描述
Two-wire Serial EEPROM 256K (32,768 x 8)

AT24C256CW-SH-B 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:SOIC包装说明:SOP, SOP8,.25
针数:8Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.32.00.51
风险等级:5.36Is Samacsys:N
最大时钟频率 (fCLK):0.4 MHz数据保留时间-最小值:40
耐久性:1000000 Write/Erase CyclesI2C控制字节:1010DDDR
JESD-30 代码:R-PDSO-G8JESD-609代码:e4
长度:5.29 mm内存密度:262144 bit
内存集成电路类型:EEPROM内存宽度:8
功能数量:1端子数量:8
字数:32768 words字数代码:32000
工作模式:SYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:32KX8
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP8,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE并行/串行:SERIAL
电源:2/5 V认证状态:Not Qualified
座面最大高度:2.16 mm串行总线类型:I2C
最大待机电流:0.000001 A子类别:EEPROMs
最大压摆率:0.003 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):1.8 V标称供电电压 (Vsup):2.5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:5.24 mm
最长写入周期时间 (tWC):5 ms写保护:HARDWARE/SOFTWARE
Base Number Matches:1

AT24C256CW-SH-B 数据手册

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Features  
Low-voltage and Standard-voltage Operation  
1.8 (VCC = 1.8V to 5.5V)  
Internally Organized as 32,768 x 8  
Two-wire Serial Interface  
Schmitt Trigger, Filtered Inputs for Noise Suppression  
Bidirectional Data Transfer Protocol  
1 MHz (5.0V, 2.7V, 2.5V), and 400 kHz (1.8V) Compatibility  
Write Protect Pin for Hardware and Software Data Protection  
64-byte Page Write Mode (Partial Page Writes Allowed)  
Self-timed Write Cycle (5 ms Max)  
Two-wire  
Serial EEPROM  
256K (32,768 x 8)  
High Reliability  
Endurance: One Million Write Cycles  
Data Retention: 40 Years  
AT24C256C  
Lead-free/Halogen-free Devices Available  
8-lead JEDEC PDIP, 8-lead JEDEC SOIC, EIAJ SOIC, 8-lead Ultra Thin Small  
Array Package (SAP), 8-lead TSSOP, and 8-ball dBGA2 Packages  
Die Sales: Wafer Form, Waffle Pack and Bumped Wafers  
Description  
The AT24C256C provides 262,144 bits of serial electrically erasable and  
programmable read-only memory (EEPROM) organized as 32,768 words of 8 bits  
each. The device’s cascadable feature allows up to eight devices to share a common  
two-wire bus. The device is optimized for use in many industrial and commercial  
applications where low-power and low-voltage operation are essential. The devices  
are available in space-saving 8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead Ultra  
Thin SAP, 8-lead TSSOP, and 8-ball dBGA2 packages. In addition, the entire family is  
available in a 1.8V (1.8V to 5.5V) version.  
Table 1.  
Pin Configurations  
Function  
8-lead SOIC  
8-lead PDIP  
Pin Name  
A0  
A1  
VCC  
A0  
A1  
1
2
3
4
8
7
6
5
VCC  
1
2
3
4
8
7
6
5
A0 – A2  
SDA  
Address Inputs  
Serial Data  
WP  
WP  
A2  
SCL  
SDA  
A2  
SCL  
SDA  
GND  
GND  
SCL  
Serial Clock Input  
8-ball dBGA2  
8-lead TSSOP  
WP  
Write Protect  
Ground  
8
7
6
5
1
2
3
4
A0  
A0  
1
2
3
4
8
7
6
5
VCC  
VCC  
GND  
A1  
A2  
WP  
WP  
SCL  
SDA  
A1  
SCL  
SDA  
A2  
GND  
GND  
Bottom View  
8-lead Ultra-Thin SAP  
8
7
6
5
1
2
3
4
VCC  
WP  
A0  
A1  
SCL  
SDA  
A2  
GND  
Bottom View  
8568A–SEEPR–11/08  

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