Datasheet > AT24C256_14

AT24C256_14

更新时间： 2024-11-19 01:18:55

品牌	Logo	应用领域
爱特美尔 - ATMEL		/
页数	文件大小	规格书
17页	149K
描述
Write Protect Pin for Hardware and Software Data Protection

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中文翻译

获取价格

数据手册

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AT24C256_14 数据手册

Features

• Low-voltage and Standard-voltage Operation

– 2.7 (V_CC= 2.7V to 5.5V)

• Internally Organized 16,384 x 8 and 32,768 x 8

• Two-wire Serial Interface

• Schmitt Trigger, Filtered Inputs for Noise Suppression

• Bidirectional Data Transfer Protocol

• 400 kHz Compatibility

• Write Protect Pin for Hardware and Software Data Protection

• 64-byte Page Write Mode (Partial Page Writes Allowed)

• Self-timed Write Cycle (5 ms Max)

• High Reliability

Two-wire

– Data Retention: 40 Years

• Lead-free/Halogen-free Devices Available

• 8-lead JEDEC SOIC and 8-lead TSSOP

Automotive

Temperature

Serial

EEPROMs

128K (16,384 x 8)

256K (32,768 x 8)

Description

The AT24C128/256 provides 131,072/262,144 bits of serial electrically erasable and

programmable read only memory (EEPROM) organized as 16,384/32,768 words of 8

bits each. The device’s cascadable feature allows up to 4 devices to share a common

Two-wire bus. The device is optimized for use in many automotive applications where

low power and low voltage operation are essential. The AT24C128 is available in

space-saving 8-lead JEDEC SOIC and 8-lead TSSOP packages. The AT24C256 is

available in a space-saving 8-lead JEDEC SOIC package. In addition, the entire family

is available in 2.7V (2.7V to 5.5V) version.

Table 1. Pin Configuration

AT24C128

AT24C256

Pin Name

A0 - A1

SDA

Function

8-lead TSSOP

Address Inputs

Serial Data

Serial Clock Input

Write Protect

No Connect

Ground

VCC

SCL

SDA

Not Recommended

for New Design.

Replaced by

AT24C128C/256C

Automotive.

GND

8-lead SOIC

VCC

SCL

SDA

GND

Rev. 5121B–SEEPR–2/07

12 3 4 5 6 7...17

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