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AT22LV10L-25SI PDF预览

AT22LV10L-25SI

更新时间: 2024-11-28 22:08:47
品牌 Logo 应用领域
爱特美尔 - ATMEL 可编程逻辑器件光电二极管输入元件时钟
页数 文件大小 规格书
11页 510K
描述
Low-Voltage UV Erasable Programmable Logic Device

AT22LV10L-25SI 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:0.300 INCH, PLASTIC, SOIC-24
针数:24Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.9
Is Samacsys:N其他特性:10 MACROCELLS
架构:PAL-TYPE最大时钟频率:34.5 MHz
JESD-30 代码:R-PDSO-G24JESD-609代码:e0
长度:15.4 mm湿度敏感等级:2
专用输入次数:11I/O 线路数量:10
输入次数:22输出次数:10
产品条款数:132端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
组织:11 DEDICATED INPUTS, 10 I/O输出函数:MACROCELL
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP24,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):240
电源:3.3/5 V可编程逻辑类型:OT PLD
传播延迟:25 ns认证状态:Not Qualified
座面最大高度:2.65 mm子类别:Programmable Logic Devices
最大供电电压:5.5 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:7.5 mm
Base Number Matches:1

AT22LV10L-25SI 数据手册

 浏览型号AT22LV10L-25SI的Datasheet PDF文件第2页浏览型号AT22LV10L-25SI的Datasheet PDF文件第3页浏览型号AT22LV10L-25SI的Datasheet PDF文件第4页浏览型号AT22LV10L-25SI的Datasheet PDF文件第5页浏览型号AT22LV10L-25SI的Datasheet PDF文件第6页浏览型号AT22LV10L-25SI的Datasheet PDF文件第7页 
Features  
Low Voltage Programmable Logic Device  
– Wide Power Supply Range - 3.0V to 5.5V  
– Ideal for Battery Powered Systems  
High Speed Operation  
– 20 ns max Propagation Delay at VCC = 3.0V  
Commercial and Industrial Temperature Ranges  
Familiar 22V10 Logic Architecture  
Low Power 3-Volt CMOS Operation  
Low-Voltage UV  
Erasable  
AT22LV10L  
Com./Ind.  
4 / 5  
AT22LV10  
Com./Ind.  
35 / 45  
Temp  
ICC (mA)  
VCC = 3.6V  
Programmable  
Logic Device  
CMOS and TTL Compatible Inputs and Outputs  
– 10 µA Leakage Maximum  
Reprogrammable - Tested 100% for Programmability  
High Reliability CMOS Technology  
– 2000V ESD Protection  
– 200 mA Latchup Immunity  
Dual-In-Line and Surface Mount Packages  
AT22LV10  
AT22LV10L  
Logic Diagram  
Description  
The AT22LV10 and AT22LV10L are low voltage compatible CMOS high performance  
Programmable Logic Devices (PLDs). Speeds down to 20 ns and power dissipation  
as low as 14.4 mW are offered. All speed ranges are specified over the 3.0V to 5.5V  
range. All pins offer a low ±10 µA leakage.  
(continued)  
Pin Configurations  
DIP/SOIC  
PLCC  
Pin Name Function  
CLK/IN  
IN  
Clock and Logic Input  
Logic Inputs  
I/O  
Bidirectional Buffers  
No Internal Connection  
3.0V to 5.5V Supply  
*
VCC  
Rev. 0190C—05/98  

AT22LV10L-25SI 替代型号

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