Features
• Very Low-cost Configuration Memory
• Programmable 1,048,576 x 1, 2,097,152 x 1, 4,194,304 x 1 and 7,340,032 x 1-bit Serial
Memories Designed to Store Configuration Programs for Field Programmable Gate
Arrays (FPGAs)
• 1.8V, 2.5V, and 3.3V I/O
• 3.3V Supply Voltage
• Program Support using an Atmel Programmer or Industry-standard Third Party
Programmers
FPGA
• In-System Programmable (ISP) via JTAG Interface (IEEE 1532)
• IEEE 1149.1 Boundary-scan Testability
Configuration
Flash Memory
• Simple Interface to SRAM FPGAs
• Pin Compatible with Xilinx® XCFxxS Series Platform Flash PROM to Configure Xilinx
Spartan® and Virtex® FPGAs
• Cascadable Read-back to Support Additional Configurations or Higher-density FPGAs
• Low-power CMOS FLASH Process
AT18F010
AT18F002
AT18F040
AT18F080
• Available in 20-lead TSSOP Package
• Low-power Standby Mode
• Fast Serial Download Speeds up to 33 MHz
• Endurance: 100,000 Write Cycles Typical
• Green (Pb/Halide-free/RoHS Compliant) Package
• Functionally-compatible with Existing AT17 Series Configuration Memories to
Configure Atmel AT40KAL Series FPGAs
AT18F Series Configuration Memory Offering
Preliminary
AT18F010
AT18F002
AT18F040
AT18F080
Density
1 Mbit
2 Mbit
4 Mbit
7 Mbit
JTAG Programming
VCCINT
Yes
3.3V
VCCO
1.8-3.3V
1.8-3.3V
VCCJ
Configuration Clock
Package
33 MHz
20-lead TSSOP
Yes
Green Package
1. Description
The AT18F Series of JTAG In-System Programmable Configuration PROMs (Configu-
rators) provide an easy-to-use, cost-effective configuration memory for Field
Programmable Gate Arrays. The AT18F Series device is packaged in a 20-lead
TSSOP. The AT18F Series Configurator uses a simple serial-access procedure to
configure one or more FPGA devices.
The AT18F Series Configurators can be programmed with Atmel or industry-standard,
third-party, stand-alone programmers such as BP, Data I/O, Hi-Lo, etc.
3672A–CNFG–1/08