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AT17N512-10CJ PDF预览

AT17N512-10CJ

更新时间: 2024-10-28 03:54:23
品牌 Logo 应用领域
爱特美尔 - ATMEL /
页数 文件大小 规格书
19页 261K
描述
Configuration Memory, 512KX1, Serial, CMOS, 6 X 6 MM, 1.04 MM HEIGHT, 1.27 MM PITCH, LAP-8

AT17N512-10CJ 数据手册

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Features  
EE Programmable 262,144 x 1-, 524,288 x 1-, 1,048,576 x 1-, 2,097,152 x 1-, and  
4,194,304 x 1-bit Serial Memories Designed to Store Configuration Programs for Field  
Programmable Gate Arrays (FPGAs)  
Available as a 3.3V ( 10%) Commercial and Industrial Version  
Simple Interface to SRAM FPGAs  
Pin Compatible with Xilinx® XC17SXXXA and XC17SXXXXL PROMs  
Compatible with Xilinx Spartan®-II, Spartan-IIE and Spartan XL FPGAs in Master Serial  
Mode  
Very Low-power CMOS EEPROM Process  
Available in 8-lead PDIP, 8-lead SOIC, 20-lead SOIC and 44-lead TQFP Packages for a  
Specific Density  
Low-power Standby Mode  
FPGA  
Configuration  
Memory  
High-reliability  
– Endurance: Minimum 10 Write Cycles  
– Data Retention: 20 Years at 85°C  
Description  
AT17N256  
AT17N512  
AT17N010  
AT17N002  
AT17N040  
The AT17N series FPGA Configuration EEPROM (Configurators) provide an easy-to-  
use, cost-effective configuration memory for Field Programmable Gate Arrays. The  
AT17N series device is packaged in the 8-lead LAP, 8-lead PDIP, 8-lead SOIC, 20-lead  
SOIC and 44-lead TQFP, see Table 1. The AT17N series Configurators uses a simple  
serial-access procedure to configure one or more FPGA devices.  
The AT17N series configurators can be programmed with industry-standard program-  
mers, Atmel’s ATDH2200E Programming Kit or Atmel’s ATDH2225 ISP Cable and  
factory programming.  
Table 1. AT17N Series Packages  
AT17N512/  
AT17N010  
3.3V  
Package  
AT17N256  
AT17N002  
AT17N040  
8-lead PDIP  
8-lead SOIC  
20-lead SOIC  
44-lead TQFP  
Yes  
Yes  
Yes  
Yes  
System Support  
Yes  
Yes  
Yes  
Yes  
3020B–CNFG–03/06  

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ALL DIMENSIONS ARE IN MILLIMETERS