Datasheet > AT17N010

AT17N010

更新时间： 2024-10-26 22:09:15

品牌	Logo	应用领域
爱特美尔 - ATMEL		存储
页数	文件大小	规格书
18页	202K
描述
FPGA Configuration Memory

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中文翻译

获取价格

数据手册

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AT17N010 数据手册

Features

• EE Programmable 262,144 x 1-, 524,288 x 1-, 1,048,576 x 1-, 2,097,152 x 1-, and

4,194,304 x 1-bit Serial Memories Designed to Store Configuration Programs for Field

Programmable Gate Arrays (FPGAs)

• Available as a 3.3V ( 10%) Commercial and Industrial Version

• Simple Interface to SRAM FPGAs

• Pin Compatible with Xilinx^®XC17SXXXA and XC17SXXXXL PROMs

• Compatible with Xilinx Spartan^®-II, Spartan-IIE and Spartan XL FPGAs in Master Serial

Mode

• Very Low-power CMOS EEPROM Process

• Available in 6 mm x 6 mm x 1 mm 8-lead LAP (Pin-compatible with 8-lead SOIC/VOIC

Packages), 8-lead PDIP, 8-lead SOIC, 20-lead SOIC and 44-lead TQFP Packages for a

Specific Density

• Low-power Standby Mode

• High-reliability

FPGA

Configuration

Memory

– Endurance: Minimum 10 Write Cycles

– Data Retention: 20 Years at 85°C

AT17N256

AT17N512

AT17N010

AT17N002

AT17N040

Description

The AT17N series FPGA Configuration EEPROM (Configurators) provide an easy-to-

use, cost-effective configuration memory for Field Programmable Gate Arrays. The

AT17N series device is packaged in the 8-lead LAP, 8-lead PDIP, 8-lead SOIC, 20-lead

SOIC and 44-lead TQFP, see Table 1. The AT17N series Configurators uses a simple

serial-access procedure to configure one or more FPGA devices.

The AT17N series configurators can be programmed with industry-standard program-

mers, Atmel’s ATDH2200E Programming Kit or Atmel’s ATDH2225 ISP Cable and

factory programming.

Table 1. AT17N Series Packages

3.3V

AT17N512/

AT17N010

Package

AT17N256

AT17N002

AT17N040

System Support

8-lead LAP

8-lead PDIP

8-lead SOIC

20-lead SOIC

44-lead TQFP

–

Yes

–

Yes

–

Yes

–

Use 8-lead LAP⁽¹⁾

–

Yes

–

Yes

–

Yes

Note:

1. The 8-lead LAP package has the same footprint as the 8-lead SOIC. Since an 8-

lead SOIC package is not available for the AT17N512/010/002 devices, it is possi-

ble to use an 8-lead LAP package instead.

Rev. 3020A–CNFG–05/03

12 3 4 5 6 7...18

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与AT17N010相关器件

型号	品牌	获取价格	描述	数据表
AT17N010_14	ATMEL	获取价格	Simple Interface to SRAM FPGAs
AT17N010-10CC	ATMEL	获取价格	FPGA Configuration Memory
AT17N010-10CI	ATMEL	获取价格	FPGA Configuration Memory
AT17N010-10CJ	ATMEL	获取价格	Configuration Memory, 1MX1, Serial, CMOS, 6 X 6 MM, 1.04 MM HEIGHT, 1.27 MM PITCH, LAP-8
AT17N010-10CL	ATMEL	获取价格	Configuration Memory, 1MX1, Serial, CMOS, 6 X 6 MM, 1.04 MM HEIGHT, 1.27 MM PITCH, LAP-8
AT17N010-10PC	ATMEL	获取价格	FPGA Configuration Memory
AT17N010-10PI	ATMEL	获取价格	FPGA Configuration Memory
AT17N010-10PJ	ATMEL	获取价格	Configuration Memory, 1MX1, Serial, CMOS, PDIP8, 0.300 INCH, PLASTIC, MS-001BA, DIP-8
AT17N010-10PL	ATMEL	获取价格	Configuration Memory, 1MX1, Serial, CMOS, PDIP8, 0.300 INCH, PLASTIC, MS-001BA, DIP-8
AT17N010-10SC	ATMEL	获取价格	FPGA Configuration Memory