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AT17C128-10JC PDF预览

AT17C128-10JC

更新时间: 2024-11-19 22:39:47
品牌 Logo 应用领域
爱特美尔 - ATMEL 存储内存集成电路可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
页数 文件大小 规格书
10页 153K
描述
FPGA Configuration E2PROM

AT17C128-10JC 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QLCC包装说明:QCCJ, LDCC20,.4SQ
针数:20Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.51
风险等级:5.83最长访问时间:50 ns
最大时钟频率 (fCLK):12.5 MHzJESD-30 代码:S-PQCC-J20
JESD-609代码:e0长度:8.9662 mm
内存密度:131072 bit内存集成电路类型:CONFIGURATION MEMORY
内存宽度:1湿度敏感等级:2
功能数量:1端子数量:20
字数:131072 words字数代码:128000
工作模式:SYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:128KX1
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC20,.4SQ
封装形状:SQUARE封装形式:CHIP CARRIER
并行/串行:SERIAL峰值回流温度(摄氏度):225
电源:5 V认证状态:Not Qualified
座面最大高度:4.57 mm最大待机电流:0.001 A
子类别:EEPROMs最大压摆率:0.01 mA
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:8.9662 mm
Base Number Matches:1

AT17C128-10JC 数据手册

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Features  
E2 Programmable 65,536 x 1, 131,072 x 1, and 262,144 x 1 bit Serial Memories Designed  
To Store Configuration Programs For Programmable Gate Arrays  
Simple Interface to SRAM FPGAs Requires Only One User I/O Pin  
Compatible With AT6000 FPGAs, ATT3000 FPGA, EPF8000 FPGAs, ORCA FPGAs,  
XC2000, XC3000, XC4000, XC5000 FPGAs, MPA1000  
Cascadable To Support Additional Configurations or Future Higher-density Arrays  
(17C128 and 17C256 only)  
Low-power CMOS EEPROM Process  
Programmable Reset Polarity  
Available In the Space-efficient Plastic DIP or Surface-mount  
PLCC and SOIC Packages  
In-System Programmable Via 2-Wire Bus  
FPGA  
Configuration  
E2PROM  
Emulation of 24CXX Serial EPROMs  
Available in 3.3V ± 10% LV Version  
Description  
65K, 128K and 256K  
The AT17C65/128/256 and AT17LV65/128/256 (AT17 Series) FPGA Configuration  
EEPROMS (Configurator) provide an easy-to-use, cost-effective configuration mem-  
ory for Field Programmable Gate Arrays. The AT17 Series is packaged in the 8-pin  
DIP and the popular 20-pin PLCC and SOIC. The AT17 Series family uses a simple  
serial-access procedure to configure one or more FPGA devices. The AT17 Series  
organization supplies enough memory to configure one or multiple smaller FPGAs.  
Using a special feature of the AT17 Series, the user can select the polarity of the reset  
function by programming a special EEPROM bit.  
AT17C65  
AT17C128  
AT17C256  
The AT17 Series can be programmed with industry standard programmers.  
Pin Configurations  
20-pin PLCC  
20-Pin SOIC  
8-Pin DIP  
0391E-A–5/97  

AT17C128-10JC 替代型号

型号 品牌 替代类型 描述 数据表
AT17LV010-10JU MICROCHIP

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IC SRL CONFIG EEPROM 1M 20-PLCC

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