Datasheet > ASM2P2351A-24AR

ASM2P2351A-24AR

更新时间： 2024-09-17 19:29:23

品牌	Logo	应用领域
PULSECORE		驱动光电二极管逻辑集成电路
页数	文件大小	规格书
13页	479K
描述
Low Skew Clock Driver, 2351 Series, 10 True Output(s), 0 Inverted Output(s), PDSO24, 0.209 INCH, SSOP-24

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ASM2P2351A-24AR 技术参数

生命周期：	Obsolete	包装说明：	0.209 INCH, SSOP-24
Reach Compliance Code：	unknown	风险等级：	5.5
系列：	2351	输入调节：	STANDARD
JESD-30 代码：	R-PDSO-G24	长度：	8.2 mm
逻辑集成电路类型：	LOW SKEW CLOCK DRIVER	功能数量：	1
反相输出次数：		端子数量：	24
实输出次数：	10	最高工作温度：	70 °C
最低工作温度：		输出特性：	3-STATE WITH SERIES RESISTOR
封装主体材料：	PLASTIC/EPOXY	封装代码：	SSOP
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE, SHRINK PITCH
传播延迟（tpd）：	4.8 ns	认证状态：	Not Qualified
Same Edge Skew-Max（tskwd）：	0.5 ns	座面最大高度：	2 mm
最大供电电压 (Vsup)：	3.6 V	最小供电电压 (Vsup)：	3 V
标称供电电压 (Vsup)：	3.3 V	表面贴装：	YES
温度等级：	COMMERCIAL	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	DUAL
宽度：	5.3 mm	最小 fmax：	100 MHz
Base Number Matches：	1

ASM2P2351A-24AR 数据手册

October 2005

rev 0.2

ASM2P2351AH

1-Line To 10-Line Clock Driver With 3-State Outputs

Product Description

Features

The ASM2P2351AH is a high-performance clock-driver

circuit that distributes one input (A) to ten outputs (Y)

with minimum skew for clock distribution. The output-

enable (OE) input disables the outputs to a high-

impedance state. Each output has an internal series

damping resistor to improve signal integrity at the load.

The ASM2P2351AH operates at nominal 3.3V Supply

Voltage.

•

Low Output Skew, Low Pulse Skew for Clock-

Distribution and Clock-Generation Applications.

•

Operates at 3.3V Supply Voltage_.

•

LVTTL-Compatible Inputs and Outputs.

Supports Mixed-Mode Signal Operation.

(5V Input and Output Voltages With 3.3V Supply

Voltage).

The propagation delays are adjusted at the factory

using the P0 and P1 pins. The factory adjustments

ensure that the part-to-part skew is minimized and is

kept within a specified window. Pins P0 and P1 are not

intended for customer use and should be connected to

GND.

•

Distributes One Clock Input to Ten Outputs.

Outputs have Internal Series Damping Resistor

to Reduce Transmission Line Effects.

•

Distributed V_CCand Ground Pins Reduce

Switching Noise.

Package Options Include Plastic Small-Outline

and Shrink Small-Outline Packages.

The ASM2P2351AH is characterized for operation

from 0°C to 70°C.

Logic Diagram (Positive Logic)

PO P1

Y10

Alliance Semiconductor

2575 Augustine Drive • Santa Clara, CA • Tel: 408.855.4900 • Fax: 408.855.4999 • www.alsc.com

Notice: The information in this document is subject to change without notice.

12 3 4 5 6 7...13

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与ASM2P2351A-24AR相关器件

型号	品牌	获取价格	描述	数据表
ASM2P2351A-24AT	PULSECORE	获取价格	Low Skew Clock Driver, 2351 Series, 10 True Output(s), 0 Inverted Output(s), PDSO24, 0.209
ASM2P2351A-24SR	PULSECORE	获取价格	Low Skew Clock Driver, 2351 Series, 10 True Output(s), 0 Inverted Output(s), PDSO24, 0.300
ASM2P2351A-24ST	PULSECORE	获取价格	Low Skew Clock Driver, 2351 Series, 10 True Output(s), 0 Inverted Output(s), PDSO24, 0.300
ASM2P2351AF-24AR	PULSECORE	获取价格	1-Line To 10-Line Clock Driver With 3-State Outputs
ASM2P2351AF-24AT	PULSECORE	获取价格	1-Line To 10-Line Clock Driver With 3-State Outputs
ASM2P2351AF-24SR	PULSECORE	获取价格	1-Line To 10-Line Clock Driver With 3-State Outputs
ASM2P2351AF-24ST	PULSECORE	获取价格	1-Line To 10-Line Clock Driver With 3-State Outputs
ASM2P2351AG-24AR	PULSECORE	获取价格	1-Line To 10-Line Clock Driver With 3-State Outputs
ASM2P2351AG-24AT	PULSECORE	获取价格	1-Line To 10-Line Clock Driver With 3-State Outputs
ASM2P2351AG-24SR	PULSECORE	获取价格	1-Line To 10-Line Clock Driver With 3-State Outputs

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