Datasheet > 逻辑 > 时钟驱动器> ASM2I9942PG-32-ER

ASM2I9942PG-32-ER

更新时间： 2024-11-26 22:11:55

品牌	Logo	应用领域
ALSC		时钟驱动器逻辑集成电路
页数	文件大小	规格书
10页	432K
描述
Low Voltage 1:18 Clock Distribution Chip

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数据手册

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May 2005

rev 0.3

ASM2I9942P

Low Voltage 1:18 Clock Distribution Chip

Features

With low output impedance (≈12Ω), in both the HIGH and

LOW logic states, the output buffers of the ASM2I9942P

are ideal for driving series terminated transmission lines.

With an output impedance of 12Ω, the ASM2I9942P can

drive two series terminated transmission lines from each

output. This capability gives the ASM2I9942P an effective

fanout of 1:36. The ASM2I9942P provides enough copies

of low skew clocks for most high performance synchronous

systems.

LVPECL Clock Input

2.5V LVCMOS Outputs for Pentium II^TM*

Microprocessor Support

200pS Maximum Targeted Output–to–Output

Skew

Maximum Output Frequency of 250MHz @3.3 V_CC

32–Lead LQFP and TQFP Packaging

Single 3.3V or 2.5V Supply

The differential LVPECL inputs of the ASM2I9942P allow

the device to interface directly with a LVPECL fanout buffer

to build very wide clock fanout trees or to couple to a high

frequency clock source. The OE pins will place the outputs

into a high impedance state. The OE pin has an internal

pullup resistor.

Pin and Function compatible with MPC942P

Functional Description

The ASM2I9942P is a 1:18 low voltage clock distribution

chip with 2.5V or 3.3V LVCMOS output capabilities. The

device is offered in two versions; the ASM2I9942C has an

LVCMOS input clock while the ASM2I9942P has a

LVPECL input clock. The 18 outputs are 2.5V or 3.3V

LVCMOS compatible and feature the drive strength to drive

50Ω series or parallel terminated transmission lines. With

output-to-output skews of 200pS, the ASM2I9942P is ideal

as a clock distribution chip for the most demanding of

synchronous systems. The 2.5V outputs also make the

device ideal for supplying clocks for a high performance

The ASM2I9942P is a single supply device. The V_CCpower

pins require either 2.5V or 3.3V. The 32 lead LQFP and

TQFP package is chosen to optimize performance, board

space and cost of the device. The 32–lead LQFP and

TQFP have a 7x7mm²body size with conservative 0.8mm

pin spacing.

Pentium II^TMmicroprocessor based design.

* Pentium II is a trademark of Intel Corporation

Block Diagram

Table 1. Function Table

Output

PECL_CLK

Q1-Q16

HIGH IMPEDANCE

OUTPUTS ENABLED

Q17

(Int. Pullup)

Alliance Semiconductor

2575, Augustine Drive • Santa Clara, CA • Tel: 408.855.4900 • Fax: 408.855.4999 • www.alsc.com

Notice: The information in this document is subject to change without notice.

12 3 4 5 6 7...10

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与ASM2I9942PG-32-ER相关器件

型号	品牌	获取价格	描述	数据表
ASM2I9942PG-32-ET	ALSC	获取价格	Low Voltage 1:18 Clock Distribution Chip
ASM2I9942PG-32-LR	ALSC	获取价格	Low Voltage 1:18 Clock Distribution Chip
ASM2I9942PG-32-LR	PULSECORE	获取价格	Low Skew Clock Driver, 9942 Series, 18 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7
ASM2I9942PG-32-LT	PULSECORE	获取价格	Low Skew Clock Driver, 9942 Series, 18 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7
ASM2I9942PG-32-LT	ALSC	获取价格	Low Voltage 1:18 Clock Distribution Chip
ASM2I99446	ALSC	获取价格	2.5V and 3.3V LVCMOS Clock Distribution Buffer
ASM2I99446-32-ER	ALSC	获取价格	2.5V and 3.3V LVCMOS Clock Distribution Buffer
ASM2I99446-32-ER	PULSECORE	获取价格	Low Skew Clock Driver, 99446 Series, 10 True Output(s), 0 Inverted Output(s), PQFP32, 7 X
ASM2I99446-32-ET	ALSC	获取价格	2.5V and 3.3V LVCMOS Clock Distribution Buffer
ASM2I99446-32-ET	PULSECORE	获取价格	Low Skew Clock Driver, 99446 Series, 10 True Output(s), 0 Inverted Output(s), PQFP32, 7 X

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