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ASM2I3807AG-20-SR PDF预览

ASM2I3807AG-20-SR

更新时间: 2024-09-24 22:11:55
品牌 Logo 应用领域
ALSC 时钟驱动器逻辑集成电路光电二极管
页数 文件大小 规格书
19页 690K
描述
3.3V CMOS 1-TO-10 CLOCK DRIVER

ASM2I3807AG-20-SR 数据手册

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June 2005  
rev 0.2  
ASM2P3807AH  
3.3V CMOS 1-TO-10 CLOCK DRIVER  
Product Description  
Features  
• 0.5 MICRON CMOS Technology  
The ASM2P3807AH 3.3V clock driver is built using  
advanced dual metal CMOS technology. This low skew  
clock driver offers 1:10 fanout. The large fanout from a  
single input reduces loading on the preceding driver and  
provides an efficient clock distribution network. The  
ASM2P3807AH offers low capacitance inputs with  
hysteresis for improved noise margins. Multiple power and  
grounds reduce noise. Typical applications are clock and  
signal distribution.  
• Guaranteed low skew < 350pS (max.)  
• Very low duty cycle distortion < 350pS (max.)  
• High speed: propagation delay < 3nS (max.)  
• Very low CMOS power levels  
• TTL compatible inputs and outputs  
• 1:10 fanout  
• Maximum output rise and fall time < 1.5nS (max.)  
• Low input capacitance: 4.5pF typical  
• Operates with 3.3V ± 0.3V Supply  
• Inputs can be driven from 3.3V or 5V components  
• Available in SSOP, SOIC, and QSOP Packages  
Block Diagram  
O1  
O2  
O3  
O4  
O5  
IN  
O6  
O7  
O8  
O9  
O10  
Alliance Semiconductor  
2575, Augustine Drive Santa Clara, CA Tel: 408.855.4900 Fax: 408.855.4999 www.alsc.com  
Notice: The information in this document is subject to change without notice.  

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