Datasheet > 微控制器和处理器 > 数字信号处理器> ASDP-21060CZ-133

ASDP-21060CZ-133

更新时间： 2024-09-16 12:31:39

品牌	Logo	应用领域
亚德诺 - ADI		微控制器和处理器外围集成电路数字信号处理器时钟
页数	文件大小	规格书
64页	817K
描述
SHARC Processor

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ASDP-21060CZ-133 数据手册

SHARC Processor

ADSP-21060/ADSP-21060L/ADSP-21062/ADSP-21062L/ADSP-21060C/ADSP-21060LC

SUMMARY

KEY FEATURES—PROCESSOR CORE

High performance signal processor for communications,

graphics and imaging applications

40 MIPS, 25 ns instruction rate, single-cycle instruction

execution

Super Harvard Architecture

4 independent buses for dual data fetch, instruction fetch,

and nonintrusive I/O

120 MFLOPS peak, 80 MFLOPS sustained performance

Dual data address generators with modulo and bit-reverse

addressing)

32-bit IEEE floating-point computation units—multiplier,

ALU, and shifter

Efficient program sequencing with zero-overhead looping:

Single-cycle loop setup

Dual-ported on-chip SRAM and integrated I/O peripherals—a

complete system-on-a-chip

IEEE JTAG Standard 1149.1 Test Access Port and on-chip

emulation

Integrated multiprocessing features

240-lead thermally enhanced MQFP_PQ4 package, 225-ball

plastic ball grid array (PBGA), 240-lead hermetic CQFP

package

32-bit single-precision and 40-bit extended-precision IEEE

floating-point data formats or 32-bit fixed-point data

format

RoHS compliant packages

CORE PROCESSOR

DUAL-PORTED SRAM

INSTRUCTION

TIMER

JTAG

TWO INDEPENDENT

DUAL-PORTED BLOCKS

CACHE

TEST AND

EMULATION

32 ꢀ 48-BIT

PROCESSOR PORT

ADDR DATA

ADDR

I/O PORT

ADDR

DATA

DAG1

DAG2

PROGRAM

SEQUENCER

8 ꢀ 4 ꢀ 32 8 ꢀ 4 ꢀ 24

EXTERNAL

PORT

IOD

IOA

PM ADDRESS BUS

ADDR BUS

MUX

DM ADDRESS BUS

MULTIPROCESSOR

INTERFACE

40/32

PM DATA BUS

DM DATA BUS

BUS

CONNECT

(PX)

DATA BUS

MUX

HOST PORT

DATA

FILE

DMA

CONTROLLER

IOP

REGISTERS

(MEMORY

MAPPED)

SERIAL PORTS

(2)

BARREL

SHIFTER

16 ꢀ 40-BIT

MULT

ALU

CONTROL,

STATUS AND

DATA BUFFERS

LINK PORTS

(6)

I/O PROCESSOR

Figure 1. Functional Block Diagram

SHARC and the SHARC logo are registered trademarks of Analog Devices, Inc.

Rev. F

Information furnished by Analog Devices is believed to be accurate and reliable.

However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 U.S.A.

Tel : 781.329.4700

Fax: 781.461.3113

www.analog.com

12 3 4 5 6 7...64

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