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AS80SSTVF16857-48VT

更新时间： 2024-10-29 22:05:51

品牌	Logo	应用领域
ALSC		双倍数据速率
页数	文件大小	规格书
12页	93K
描述
DDR 14-Bit Registered Buffer

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中文翻译

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数据手册

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AS80SSTVF16857-48VT 数据手册

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July 2003

Advance Information

PulseC re AS80SSTVF16857

DDR 14-Bit Registered Buffer

Recommended Applications

Features

•

DDR memory modules

Provides complete DDR DIMM logic solution

with PCV857

•

Differential clock signals

Meets SSTL_2 class II specifications on outputs

Supports SSTL_2 Class I and II specifications

•

SSTL_2-compatible data registers

Low voltage operation – V = 2.3V to 2.7V

•

Available in 48-pin TSSOP and TVSOP package

Operates at 2.3V to 2.7V for PC1600, PC2100, and

PC2700; 2.5V to 2.7V for PC3200

•

Pinout and Functionality Compatible with JEDEC

Standard SSTV16857

Block Diagram

Pin Configuration

CLK

CLKB

GND

VDDQ

GND

VDD

RESETB

CLK

VREF

GND

VDDQ

CLKB

CLK

VDD

GND

VREF

RESETB

VDDQ

GND

To 13 other channels

VDDQ

GND

Q10

Q11

Q12

VDDQ

GND

Q13

Q14

D10

D11

D12

VDD

GND

D13

D14

48-Pin TSSOP & TVSOP

6.10 mm body, 0.50 mm pitch = TSSOP

4.40 mm body, 0.40 mm pitch = TSSOP (TVSOP)

8/1/03; V.0.10

Alliance Semiconductor

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