AS7C4098-12JIN

更新时间： 2024-11-22 22:06:55

品牌	Logo	应用领域
ALSC		静态存储器
页数	文件大小	规格书
10页	235K
描述
5V/3.3V 256K x 16 CMOS SRAM

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数据手册

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AS7C4098-12JIN 数据手册

AS7C4098

AS7C34098

January 2005

5V/3.3V 256K × 16 CMOS SRAM

Features

• AS7C4098 (5V version)

• Low power consumption: STANDBY

• AS7C34098 (3.3V version)

• Industrial and commercial temperature

• Organization: 262,144 words × 16 bits

• Center power and ground pins

• High speed

- 10/12/15/20 ns address access time

- 5/6/7/8 ns output enable access time

• Low power consumption: ACTIVE

- 1375 mW (AS7C4098)/max @ 12 ns

- 576 mW (AS7C34098)/max @ 10 ns

- 110 mW (AS7C4098)/max CMOS

- 72 mW (AS7C34098)/max CMOS

• Individual byte read/write controls

• Easy memory expansion with CE, OE inputs

• TTL- and CMOS-compatible, three-state I/O

• 44-pin JEDEC standard packages

- 400-mil SOJ

- TSOP 2

• ESD protection ≥ 2000 volts

• Latch-up current ≥ 100 mA

Logic block diagram

Pin arrangement for SOJ and TSOP 2

44-pin (400 mil) SOJ

TSOP2

A17

1024 × 256 × 16

GND

A16

A15

Array

(4,194,304)

A12

A13

I/O16

I/O15

I/O14

I/O13

GND

V_CC

I/O12

I/O11

I/O10

I/O1

I/O2

I/O3

I/O4

I/O1–I/O8

I/O9–I/O16

I/O

buffer

Control circuit

V_CC

GND

I/O5

I/O6

I/O7

Column decoder

I/O8

I/O9

A14

A13

A12

A11

A10

Selection guide

–10

–12

–15

–20

Unit

Maximum address access time

Maximum output enable access time

AS7C4098

AS7C34098

AS7C4098

AS7C34098

–

250

130

220

110

180

100

Maximum operating current

160

–

Maximum CMOS standby current

1/13/05; v.1.9

Alliance Semiconductor

P. 1 of 10

12 3 4 5 6 7...10

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AS7C4098-12TCN	ALSC	获取价格	5V/3.3V 256K x 16 CMOS SRAM
AS7C4098-12TI	ALSC	获取价格	5V/3.3V 256K x 16 CMOS SRAM
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AS7C4098-15JI	ALSC	获取价格	5V/3.3V 256K x 16 CMOS SRAM