Datasheet > AS7C33256PFD36A-100BI

AS7C33256PFD36A-100BI

更新时间： 2024-11-05 03:37:59

品牌	Logo	应用领域
ALSC		静态存储器
页数	文件大小	规格书
14页	584K
描述
Standard SRAM, 256KX36, 12ns, CMOS, PBGA119, 14 X 20 MM, BGA-119

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April 2002

Preliminary

AS7C33256PFD32A

AS7C33256PFD36A

3.3V 256K × 32/36 pipeline burst synchronous SRAM

Features

• Organization: 262,144 words × 32 or 36 bits

• Fast clock speeds to 166 MHz in LVTTL/LVCMOS

• Fast clock to data access: 3.5/3.8/4.0/5.0 ns

• Fast OE access time: 3.5/3.8/4.0/5.0 ns

• Fully synchronous register-to-register operation

• Single register “Flow-through” option

• Asynchronous output enable control

• Available in 100-pin TQFP and 119-pin BGA packages

• Byte write enables

• 3.3V core power supply

• 2.5V or 3.3V I/O operation with separate V

DDQ

• 30 mW typical standby power in power down mode

• Dual-cycle deselect

• NTD™ pipeline architecture available

- Single-cycle deselect also available (AS7C33256PFS32A/

AS7C33256PFS36A)

(AS7C33256NTD32A/ AS7C33256NTD36A)

Pentium is a registered trademark of Intel Corporation. NTD™ is a

trademark of Alliance Semiconductor Corporation. All trademarks

mentioned in this document are the property of their respective owners

• Available in both 2 chip enable and 3 chip enable

- 2 CE part number is AS7C33256PFD32A2 or AS7C33256PFD36A2

• Pentium^®compatible architecture and timing

Logic block diagram

LBO

CLK

ADV

ADSC

ADSP

CLK

CLR

Burst logic

256K × 32/36

Memory

array

CLK

A[17:0]

Address

36/32

GWE

DQ_d

BWE

Byte write

registers

CLK

DQ_c

Byte write

registers

CLK

DQ_b

Byte write

registers

CLK

DQ_a

Byte write

registers

CLK

CE0

CE1

CE2

Output

registers

CLK

Input

registers

CLK

Enable

CLK

Enable

delay

Power

down

CLK

36/32

DQ[a;d]

Selection guide

–166

–150

6.6

–133

–100

Units

Minimum cycle time

7.5

133

Maximum pipelined clock frequency

Maximum pipelined clock access time

Maximum operating current

166

3.5

475

130

150

3.8

100

MHz

450

110

425

100

325

Maximum standby current

Maximum CMOS standby current (DC)

4/15/02; v.1.8

Alliance Semiconductor

P. 1 of 14

12 3 4 5 6 7...14

中文翻译

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与AS7C33256PFD36A-100BI相关器件

型号	品牌	获取价格	描述	数据表
AS7C33256PFD36A-133BC	ALSC	获取价格	Standard SRAM, 256KX36, 10ns, CMOS, PBGA119, 14 X 20 MM, BGA-119
AS7C33256PFD36A-133BI	ALSC	获取价格	Standard SRAM, 256KX36, 10ns, CMOS, PBGA119, 14 X 20 MM, BGA-119
AS7C33256PFD36A-133TQC	ISSI	获取价格	Standard SRAM, 256KX36, 4ns, CMOS, PQFP100, 14 X 20 MM, TQFP-100
AS7C33256PFD36A-133TQC	ALSC	获取价格	3.3V 256K x 32/36 pipelined burst synchronous SRAM
AS7C33256PFD36A-133TQCN	ALSC	获取价格	3.3V 256K x 32/36 pipelined burst synchronous SRAM
AS7C33256PFD36A-133TQCN	ISSI	获取价格	Standard SRAM, 256KX36, 4ns, CMOS, PQFP100, 14 X 20 MM, LEAD FREE, TQFP-100
AS7C33256PFD36A-133TQI	ALSC	获取价格	3.3V 256K x 32/36 pipelined burst synchronous SRAM
AS7C33256PFD36A-133TQI	ISSI	获取价格	暂无描述
AS7C33256PFD36A-133TQIN	ALSC	获取价格	3.3V 256K x 32/36 pipelined burst synchronous SRAM
AS7C33256PFD36A-133TQIN	ISSI	获取价格	Standard SRAM, 256KX36, 4ns, CMOS, PQFP100, 14 X 20 MM, LEAD FREE, TQFP-100

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