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AS7C33256PFD32A-150TQIN PDF预览

AS7C33256PFD32A-150TQIN

更新时间: 2024-11-04 20:50:51
品牌 Logo 应用领域
ALSC 时钟ISM频段静态存储器内存集成电路
页数 文件大小 规格书
16页 467K
描述
Standard SRAM, 256KX32, 3.8ns, CMOS, PQFP100, 14 X 20 MM, LEAD FREE, TQFP-100

AS7C33256PFD32A-150TQIN 数据手册

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July 2004  
AS7C33256PFD32A  
AS7C33256PFD36A  
®
3.3V 256K × 32/36 pipelined burst synchronous SRAM  
Features  
• Organization: 262,144 words x 32 or 36 bits  
• Fast clock speeds to 166 MHz in LVTTL/LVCMOS  
• Fast clock to data access: 3.5/3.8/4.0/5.0 ns  
• Fast OE access time: 3.5/3.8/4.0/5.0 ns  
• Fully synchronous register-to-register operation  
• Dual-cycle deselect  
• Multiple chip enables for easy expansion  
• 3.3V core power supply  
• 2.5V or 3.3V I/O operation with separate V  
DDQ  
• 30 mW typical standby power in power down mode  
1
• NTD™ pipeline architecture available  
(AS7C33256NTD32A/ AS7C33256NTD36A)  
Single-cycle deselect AS7C33256PFS32A/36A also available  
• Asynchronous output enable control  
• Available in100-pin TQFP  
1
NTD™ is a trademark of Alliance Semiconductor Corporation.  
• Byte write enables  
All trademarks mentioned in this document are the property of their  
respective owners.  
Logic block diagram  
LBO  
CLK  
CLK  
CE  
ADV  
Burst logic  
ADSC  
CLR  
256K × 32/36  
Memory  
array  
18  
ADSP  
2
2
18  
16  
18  
D
CE  
CLK  
Q
A
[17:0]  
Address  
register  
36/32  
36/32  
BWE  
GWE  
d
D
Q
DQ  
d
Byte write  
BW  
registers  
CLK  
D
Q
DQ  
c
BW  
c
Byte write  
registers  
CLK  
D
Q
DQ  
b
BW  
b
Byte write  
registers  
CLK  
D
Q
DQ  
a
4
BW  
a
Byte write  
registers  
CLK  
D
CE0  
CE1  
CE2  
OE  
Q
Q
Output  
Input  
Enable  
register  
registers  
registers  
CE  
CLK  
CLK  
CLK  
D
Enable  
Power  
down  
delay  
ZZ  
register  
CLK  
36/32  
DQ[a:d]  
OE  
Selection guide  
–166  
6
–150  
6.6  
–133  
–100  
10  
Units  
ns  
Minimum cycle time  
7.5  
133  
4
Maximum clock frequency  
Maximum clock access time  
Maximum operating current  
Maximum standby current  
Maximum CMOS standby current  
166  
3.5  
475  
130  
30  
150  
3.8  
100  
5
MHz  
ns  
450  
110  
30  
425  
100  
30  
325  
90  
mA  
mA  
mA  
30  
7/12/04, v.1.1  
Alliance Semiconductor  
P. 1 of 16  
Copyright ©Alliance Semiconductor. All rights reserved.  

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