Datasheet > 存储 > SRAM> AS7C331MNTD18A-166TQIN

AS7C331MNTD18A-166TQIN

更新时间： 2024-11-01 23:04:23

品牌	Logo	应用领域
ALSC		存储内存集成电路静态存储器时钟
页数	文件大小	规格书
18页	424K
描述
3.3V 1M x 18 Pipelined SRAM with NTD

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AS7C331MNTD18A-166TQIN 数据手册

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December 2004

AS7C331MNTD18A

3.3V 1M x 18 Pipelined SRAM with NTD^TM

Features

• Individual byte write and global write

• Clock enable for operation hold

• Multiple chip enables for easy expansion

• 3.3V core power supply

• 2.5V or 3.3V I/O operation with separate V

• Self-timed write cycles

• Organization: 1,048,576 words × 18 bits

™

• NTD architecture for efficient bus operation

• Fast clock speeds to 166 MHz

• Fast clock to data access: 3.4/3.8 ns

• Fast OE access time: 3.4/3.8 ns

• Fully synchronous operation

• Asynchronous output enable control

• Available in 100-pin TQFP package

DDQ

• Interleaved or linear burst modes

• Snooze mode for standby operation

Logic block diagram

A[19:0]

Address

burst logic

CLK

CE0

CE1

CE2

Write delay

addr. registers

CLK

R/W

BWa

BWb

Control

logic

CLK

ADV / LD

LBO

1M x 18

SRAM

array

CLK

DQ [a,b]

Data

input

CLK

CEN

CLK

Output

DQ [a,b]

Selection guide

-166

-133

7.5

133

3.8

270

Units

Minimum cycle time

Maximum clock frequency

Maximum clock access time

Maximum operating current

Maximum standby current

166

3.4

290

MHz

Maximum CMOS standby current (DC)

12/24/04, v 2.7

Alliance Semiconductor

P. 1 of 18

12 3 4 5 6 7...18

中文翻译

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AS7C331MNTD18A-225BI	ISSI	获取价格	ZBT SRAM, 1MX18, 6.9ns, CMOS, PBGA165, BGA-165
AS7C331MNTD18A-225TQC	ISSI	获取价格	ZBT SRAM, 1MX18, 6.9ns, CMOS, PQFP100, 14 X 20 MM, TQFP-100
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