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AS7C33128PFS18A-150TQI PDF预览

AS7C33128PFS18A-150TQI

更新时间: 2024-11-02 14:29:23
品牌 Logo 应用领域
ALSC 静态存储器
页数 文件大小 规格书
11页 207K
描述
Standard SRAM, 128KX18, 10ns, CMOS, PQFP100, 14 X 20 MM, TQFP-100

AS7C33128PFS18A-150TQI 数据手册

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AS7C33128PFS16A  
AS7C33128PFS18A  
January 2001  
Preliminary Information  
®
3.3V 128K × 16/18 pipeline burst synchronous SRAM  
Features  
• Asynchronous output enable control  
• Economical 100-pin TQFP package  
• Byte write enables  
• Multiple chip enables for easy expansion  
• 3.3V core power supply  
• Organization: 131,072words × 16 or 18 bits  
• Fast clock speeds to 166 MHz in LVTTL/LVCMOS  
• Fast clock to data access: 3.5/3.8/4.0/5.0 ns  
• Fast OE access time: 3.5/3.8/4.0/5.0 ns  
• Fully synchronous register-to-register operation  
• “Flow-through” mode  
• 2.5V or 3.3V I/O operation with separate V  
• 30 mW typical standby power in power down mode  
DDQ  
• Single-cycle deselect  
• Pentium® compatible architecture and timing  
*
Logic block diagram  
Pin arrangement  
LBO  
CLK  
ADV  
CLK  
CS  
Burst logic  
17 15  
128K × 16/18  
Memory  
ADSC  
ADSP  
CLR  
NC  
NC  
NC  
1
A17  
NC  
NC  
V
SSQ  
NC  
DQpa/NC  
DQa  
DQa  
80  
79  
78  
77  
76  
75  
74  
73  
72  
71  
70  
69  
68  
67  
66  
65  
64  
63  
62  
61  
60  
59  
58  
57  
56  
55  
54  
53  
52  
51  
2
17  
17  
AddresQs  
register  
D
array  
3
A[16:0]  
V
4
DDQ  
V
DDQ  
CS  
V
5
SSQ  
NC  
6
CLK  
NC  
7
16/18  
DQb  
DQb  
8
16/18  
9
V
DDQ  
V
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
SSQ  
SSQ  
GWE  
BW  
b
D
Q
DQb  
V
V
DDQ  
DQb  
DQb  
FT  
DQa  
DQa  
VSS  
NC  
Byte Write  
registers  
CLK  
BWE  
TQFP 14 × 20mm  
V
NC  
V
DD  
D
Q
DQa  
V
ZZ  
DD  
2
BW  
Byte Write  
registers  
a
SS  
DQa  
DQa  
DQb  
DQb  
DDQ  
CLK  
V
SSQ  
V
CE0  
CE1  
CE2  
DDQ  
OE  
D EnableQ  
register  
Input  
V
V
SSQ  
Output  
DQb  
DQa  
DQa  
NC  
registers  
registers  
DQb  
DQpb/NC  
NC  
CE  
CLK  
CLK  
CLK  
NC  
D EnableQ  
delay  
V
V
DDQ  
SSQ  
SSQ  
V
V
Power  
down  
DDQ  
ZZ  
NC  
NC  
NC  
NC  
NC  
NC  
register  
CLK  
OE  
DATA [17:0]  
DATA [15:0]  
FT  
Note: pins 24, 74 are NC for ×16.  
Selection guide  
AS7C33128PFS16A AS7C33128PFS16A AS7C33128PFS16A AS7C33128PFS16A  
–166  
–150  
–133  
7.5  
133  
4
–100  
Units  
ns  
Minimum cycle time  
6
6.7  
10  
Maximum pipelined clock frequency  
Maximum pipelined clock access time  
Maximum operating current  
166  
3.5  
475  
130  
30  
150  
3.8  
100  
5
MHz  
ns  
450  
110  
30  
425  
100  
30  
325  
90  
mA  
mA  
mA  
Maximum standby current  
Maximum CMOS standby current (DC)  
30  
*
®
Pentium is a registered trademark of Intel Corporation. NTD™ is a trademark of Alliance Semiconductor Corporation. All trademarks mentioned in this document are  
the property of their respective owners.  
2/1/01; V.0.9  
Alliance Semiconductor  
P. 1 of 11  
Copyright © Alliance Semiconductor. All rights reserved.  

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