High-performance
4Mb synchronous
CMOS SRAM
AS7C3128PFS32/ 36A
®
128K × 32/ 36 synchronous SRAM
Advance information
Features
• Byte write enables
• Organization: 131,072 words × 32 or 36 bits
• Fast clock speeds to 166 MHz in LVTTL/ LVCMOS
• Fast clock to data access: 3.5/ 3.8/ 4/ 5 ns
• Fast OEaccess time: 3.5/ 3.5/ 3.8/ 4 ns
• Fully synchronous register-to-register operation
• Single register ‘flow-through’ mode
• Clock enable for operation hold
• Multiple chip enables for easy expansion
• 3.3 core power supply
• 2.5V or 3.3V I/ O operation with separate V
DDQ
• Automatic power down: 10 mW typical standby power
• NTD™ pipeline architecture available
(AS7C3128KNTD32/ 36)
• Single cycle de-select
• Pentium® compatible architecture and timing
• Synchronous and asynchronous output enable control
• Economical 100-pin TQFP package
Logic block diagram
Pin arrangement
lbo
clk
adv
clk
ce
clr
q0
burst logic
adsc
adsp
128k×32/ 36
memory
q1
17
15
17
17
d
ce
clk
q
a[16:0]
array
address
register
DQPb/ NC
DQb
DQPc/ NC
DQc
1
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
2
DQb
DQc
3
36
36
gwe
bwe
V
V
4
DDQ
DDQ
d
q
q
q
q
V
V
5
dqd
SSQ
SSQ
bw
d
DQb
DQb
DQb
DQb
DQc
DQc
DQc
DQc
6
byte write
registers
clk
7
8
9
d
dqc
V
V
10
11
bw
c
SSQ
SSQ
DDQ
byte write
registers
V
V
DDQ
DQb
DQb
DQc 12
DQc 13
FT 14
TQFP 14x20mm
clk
d
V
SS
dqb
bw
b
V
V
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
DD
DD
byte write
registers
clk
V
V
DD
DD
V
ZZ
SS
DQa
DQa
DQd
d
DQd
dqa
byte write
registers
bw
a
4
V
V
DDQ
DDQ
V
V
SSQ
SSQ
clk
d
DQa
DQa
DQa
DQa
DQd
DQd
DQd
DQd
ce0
ce1
ce2
q
q
oe
output
registers
le
enable
input
registers
clk
register
V
V
SSQ
SSQ
ce
V
V
DDQ
clk
DDQ
clk
DQa
DQd
DQa
DQd
d
enable
delay
DQPa/ NC
DQPd/ NC 30
power
down
zz
oe
register
clk
36
ft
data [35:0]
Note: Pins 1,30,51,80 are NC for ×32
Selection guide
AS7C3128PFS32/ 36A AS7C3128PFS32/ 36A AS7C3128PFS32/ 36A AS7C3128PFS32/ 36A
3.5
6
166.7
-3.8
6.7
150
-4
7.5
133.3
-5
10
100
Units
ns
MHz
Minimum cycle time
Maximum clock frequency
Maximum pipelined clock access
time
3.5
3.8
4
5
ns
Maximum operating current
Maximum standby current
Maximum CMOS standby current
(DC)
350
60
325
60
300
60
250
60
mA
mA
5
5
5
5
mA
6/ 8/ 00
ALLIANCE SEMICONDUCTOR
1
Copyright ©2000 Alliance Semiconductor. All rights reserved.