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AS7C31025B-15TJI PDF预览

AS7C31025B-15TJI

更新时间: 2024-10-25 22:56:35
品牌 Logo 应用领域
ALSC 静态存储器
页数 文件大小 规格书
9页 99K
描述
3.3V 128K X 8 CMOS SRAM (Center power and ground)

AS7C31025B-15TJI 数据手册

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March 2004  
AS7C31025B  
®
3.3V 128K X 8 CMOS SRAM (Center power and ground)  
Features  
• Industrial and commercial temperatures  
• Organization: 131,072 x 8 bits  
• High speed  
- 10/12/15/20 ns address access time  
- 5, 6, 7, 8 ns output enable access time  
• Low power consumption: ACTIVE  
- 252 mW / max @ 10 ns  
• Easy memory expansion with CE  
• Center power and ground  
• TTL/LVTTL-compatible, three-state I/O  
• JEDEC-standard packages  
- 32-pin, 300 mil SOJ  
- 32-pin, 400 mil SOJ  
• ESD protection 2000 volts  
• Latch-up current 200 mA  
, OE inputs  
• Low power consumption: STANDBY  
- 18 mW / max CMOS  
• 6 T 0.18 u CMOS technology  
Pin arrangement  
Logic block diagram  
V
CC  
32-pin SOJ (300 mil)  
32-pin SOJ (400 mil)  
GND  
Input buffer  
A16  
A0  
1
32  
31  
30  
A15  
A14  
A13  
OE  
I/O7  
A1  
A2  
A3  
CE  
I/O0  
I/O1  
2
3
4
5
6
7
A0  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
I/O7  
I/O0  
512 x 256 x 8  
Array  
(1,048,576)  
I/O6  
GND  
V
8
CC  
V
GND  
I/O2  
I/O3  
WE  
A4  
A5  
A6  
A7  
9
10  
11  
12  
13  
14  
15  
16  
CC  
I/O5  
I/O4  
A12  
A11  
A10  
WE  
A9  
A8  
18  
17  
Control  
circuit  
Column decoder  
OE  
CE  
Selection guide  
-10  
-12  
12  
6
-15  
15  
7
-20  
20  
8
Unit  
ns  
Maximum address access time  
Maximum output enable access time  
Maximum operating current  
10  
5
ns  
70  
5
65  
5
60  
5
55  
5
mA  
mA  
Maximum CMOS standby current  
3/24/04, v. 1.3  
Alliance Semiconductor  
P. 1 of 9  
Copyright © Alliance Semiconductor. All rights reserved.  

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