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AS7C31024B-12STC PDF预览

AS7C31024B-12STC

更新时间: 2024-11-23 22:56:35
品牌 Logo 应用领域
ALSC 存储内存集成电路静态存储器光电二极管
页数 文件大小 规格书
9页 121K
描述
3.3V 128K X 8 CMOS SRAM

AS7C31024B-12STC 数据手册

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March 2004  
AS7C31024B  
®
3.3V 128K X 8 CMOS SRAM  
Features  
• Industrial and commercial temperatures  
• Organization: 131,072 words x 8 bits  
• High speed  
- 10/12/15/20 ns address access time  
- 5, 6, 7, 8 ns output enable access time  
• Low power consumption: ACTIVE  
- 252 mW / max @ 10 ns  
• Easy memory expansion with CE1, CE2, OE inputs  
• TTL/LVTTL-compatible, three-state I/O  
• 32-pin JEDEC standard packages  
- 300 mil SOJ  
- 400 mil SOJ  
- 8 × 20mm TSOP 1  
- 8 x 13.4mm sTSOP 1  
• ESD protection 2000 volts  
• Latch-up current 200 mA  
• Low power consumption: STANDBY  
- 18 mW / max CMOS  
• 6T 0.18u CMOS technology  
Pin arrangement  
32-pin SOJ (300 mil)  
32-pin SOJ (400 mil)  
Logic block diagram  
V
A15  
CE2  
WE  
A13  
A8  
A9  
A11  
NC  
A16  
A14  
A12  
A7  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
I/O0  
I/O1  
I/O2  
GND  
1
2
3
4
5
6
7
8
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
CC  
V
CC  
GND  
9
OE  
A10  
Input buffer  
10  
11  
12  
13  
14  
15  
16  
CE1  
I/O7  
I/O6  
I/O5  
I/O4  
I/O3  
A0  
A1  
A2  
I/O7  
I/O0  
512 x 256 x 8  
A3  
A4  
A5  
A6  
A7  
A8  
Array  
32-pin (8 x 20mm) TSOP I  
32-pin (8 x 13.4mm) sTSOP1  
(1,048,576)  
A11  
A9  
1
OE  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
2
A10  
CE1  
I/O7  
I/O6  
I/O5  
I/O4  
I/O3  
GND  
I/O2  
I/O1  
I/O0  
A0  
3
A8  
4
A13  
WE  
CE2  
A15  
WE  
5
Column decoder  
Control  
circuit  
OE  
6
7
CE1  
CE2  
8
V
CC  
9
NC  
10  
11  
12  
13  
14  
15  
16  
A16  
A14  
A12  
A7  
A6  
A1  
18  
17  
A5  
A2  
A4  
A3  
Selection guide  
-12  
12  
6
-15  
15  
7
-20  
Unit  
ns  
-10  
10  
5
Maximum address access time  
Maximum output enable access time  
Maximum operating current  
20  
8
ns  
70  
5
65  
5
60  
5
55  
5
mA  
mA  
Maximum CMOS standby current  
3/24/04, v.1.2  
Alliance Semiconductor  
P. 1 of 9  
Copyright © 2003 Alliance Semiconductor. All rights reserved.  

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