Datasheet > AS7C251MFT18A

AS7C251MFT18A

更新时间： 2024-11-24 22:30:11

品牌	Logo	应用领域
ALSC		静态存储器
页数	文件大小	规格书
19页	512K
描述
2.5V 1M x 18 flowthrough burst synchronous SRAM

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数据手册

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AS7C251MFT18A 数据手册

December 2004

AS7C251MFT18A

2.5V 1M x 18 flowthrough burst synchronous SRAM

Features

•

Individual byte write and global write

• Organization: 1,048,576 words x18 bits

• Fast clock to data access: 7.5/8.5/10 ns

• Fast OE access time: 3.5/4.0 ns

• Fully synchronous flow-through operation

• Asynchronous output enable control

• Available 100-pin TQFP package

• Multiple chip enables for easy expansion

• 2.5V core power supply

• Linear or interleaved burst control

• Snooze mode for reduced power-standby

Logic block diagram

LBO

Burst logic

CLK

ADV

CLK

CLR

ADSC

ADSP

1M x 18

Memory

array

20 18

A[19:0]

Address

CLK

GWE

BW_b

DQb

Byte Write

registers

BWE

BW_a

CLK

DQa

Byte Write

registers

CLK

CE0

CE1

Output

buffers

Input

registers

Enable

CLK

CE2

CLK

Enable

delay

CLK

Power

down

DQ[a,b]

Selection guide

-75

8.5

7.5

275

-85

-10

Units

Minimum cycle time

8.5

250

Maximum clock access time

Maximum operating current

Maximum standby current

Maximum CMOS standby current (DC)

230

12/24/04, v. 1.2

Alliance Semiconductor

1 of 19

12 3 4 5 6 7...19

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