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• Smallest footprint packages
- 48 ball FBGA
- 400 mil TSOP II
• Center power and ground pins for low noise
• ESD protection ≥ 2000 volts
• Organization: 262,144 words × 16 bits
• Intelliwatt™ active power reduction circuitry
• 1.65V to 1.95V operating range
• 35/ 55/ 70/ 100 ns address access time
• Low power consumption
• Latch-up current ≥ 200 mA
- Active: 40 mW max (100 ns cycle) 1.95 V
- Standby: 90 µW max
- Very low DC component in active power, 100 µA
• Individual byte read/ write controls
• 1.2V data retention
• Industrial temperature range available (-40 to +85 °C)
• Other voltage versions available
- 2.7V to 3.6V (AS7C34098LL)
- 2.3V to 3.0V (AS7C254098LL)
• Easy memory expansion with CE, OE inputs
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TSOP II
A0
A1
A2
A3
A4
A6
A7
A8
A12
A13
VDD
A0
A1
1
2
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A17
A16
A15
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
VSS
VDD
I/O11
I/O10
1024 × 256 × 16
V
SS
A2
3
A3
4
Array
A4
5
(4,194,304)
CE
6
I/O0
I/O1
I/O2
I/O3
VDD
VSS
I/O4
I/O5
I/O6
I/O7
WE
A5
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
I/ O0–I/ O7
I/ O8–I/ O15
I/ O
buffer
Control circuit
Column decoder
WE
I/O9
I/O8
NC
A14
A13
A12
A11
A10
A6
A7
A8
A9
UB
OE
LB
CE
48-CSP Ball-Grid-Array Package
1
2
3
4
5
6
A
B
C
D
E
LB
OE
UB
A
A
A
2
NC
0
1
I/ O
I/ O
A
A
CE
I/ O
I/ O
I/ O
8
9
3
4
0
2
I/ O
A
A
6
10
11
12
13
5
1
V
I/ O
I/ O
I/ O
A
A
I/ O
V
DD
SS
17
7
3
V
NC
A
I/ O
V
SS
DD
16
4
F
I/ O
A
A
I/ O
I/ O
I/ O
14
14
15
5
6
7
G
H
I/ O
NC
A
A
WE
15
12
13
NC
A
A
A
A
11
NC
8
9
10
6HOHFWLRQꢀJXLGH
-35
35
10
45
45
-55
55
10
28
45
-70
-100
100
10
Unit
ns
Maximum address access time
Maximum output enable access time
Maximum operating current
70
10
25
45
ns
20
mA
µA
Maximum CMOS standby current
45
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Copyright ©1998 Alliance Semiconductor. All rights reserved.