Datasheet > 存储 > SRAM> AS7C1026A-12JI

AS7C1026A-12JI

更新时间： 2024-11-06 03:52:27

品牌	Logo	应用领域
ALSC		静态存储器
页数	文件大小	规格书
9页	151K
描述
5V/3.3V 64K X 16 CMOS SRAM

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中文翻译

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数据手册

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AS7C1026A-12JI 数据手册

January 2001

Advance Information

AS7C1026A

AS7C31026A

5V/3.3V 64K X 16 CMOS SRAM

Features

• Latest 6T 0.25u CMOS technology

• 2.0V data retention

• AS7C1026A (5V version)

• AS7C31026A (3.3V version)

• Industrial and commercial versions

• Organization: 65,536 words × 16 bits

• Center power and ground pins for low noise

• High speed

- 10/12/15/20 ns address access time

- 3/3/4/5 ns output enable access time

• Low power consumption: ACTIVE

- 660 mW (AS7C1026A) / max @ 10 ns

- 324 mW (AS7C31026A) / max @ 10 ns

• Low power consumption: STANDBY

- 55 mW (AS7C1026A) / max CMOS I/O

- 36 mW (AS7C31026A) / max CMOS I/O

• Easy memory expansion with CE, OE inputs

• TTL-compatible, three-state I/O

• JEDEC standard packaging

- 44-pin 400 mil SOJ

- 44-pin 400 mil TSOP II

- 48-ball 6 mm × 8 mm CSP mBGA

• ESD protection ≥ 2000 volts

• Latch-up current ≥ 200 mA

Pin arrangement

Logic block diagram

48-CSP mini Ball-Grid-Array Package

44-Pin SOJ, TSOP II (400 mil)

I/O15

I/O14

I/O13

I/O12

GND

A₀

A₁

A₂

64K × 16

Array

GND

I/O8 UB

A4 CE I/O0

A6 I/O1 I/O2

A7 I/O3 V_DD

NC I/O4 V_SS

I/O9 I/O10 A5

V_SSI/O11 NC

V_DDI/O12 NC

I/O0

I/O1

I/O2

I/O3

I/O0–I/O7

I/O

F I/O14 I/O13 A14 A15 I/O5 I/O6

G I/O15 NC A12 A13 WE I/O7

GND

I/O4

I/O5

I/O6

I/O7

A15

A14

A13

A12

Control circuit

buffer

I/O8–I/O15

I/O11

I/O10

I/O9

I/O8

A10

A11

Column decoder

A9 A10 A11 NC

Selection guide

AS7C1026A-10

AS7C1026A-12

AS7C1026A-15

AS7C1026A-20

AS7C31026A-10 AS7C31026A-12 AS7C31026A-15 AS7C31026A-20 Unit

Maximum address access time

Maximum output enable access time

AS7C1026A

120

110

100

Maximum operating current

AS7C31026A

AS7C1026A

AS7C31026A

Maximum CMOS standby

current

2/6/01; V.0.9

Alliance Semiconductor

P. 1 of 9

12 3 4 5 6 7...9

中文翻译

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