Datasheet > AS7C1025A

AS7C1025A

更新时间： 2024-09-15 22:40:59

品牌	Logo	应用领域
ALSC		静态存储器
页数	文件大小	规格书
8页	117K
描述
5V/3.3V 128K X 8 CMOS SRAM (Revolutionary pinout)

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数据手册

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AS7C1025A 数据手册

January 2001

Advance Information

AS7C1025A

AS7C31025A

5V/3.3V 128K X 8 CMOS SRAM (Revolutionary pinout)

• Latest 6T 0.25u CMOS technology

• 2.0V data retention

Features

• AS7C1025A (5V version)

• AS7C31025A (3.3V version)

• Industrial and commercial temperatures

• Organization: 131,072 x 8 bits

• High speed

- 10/10/12/15/20 ns address access time

- 3/3/4/5 ns output enable access time

• Low power consumption: ACTIVE

- 660 mW (AS7C1025A) / max @ 10 ns (5V)

- 324 mW (AS7C31025A) / max @ 10 ns (3.3V)

• Low power consumption: STANDBY

- 55 mW (AS7C1025A) / max CMOS (5V)

- 36 mW (AS7C31025A) / max CMOS (3.3V)

• Easy memory expansion with CE

• Center power and ground

, OE inputs

• TTL/LVTTL-compatible, three-state I/O

• JEDEC-standard packages

- 32-pin, 300 mil SOJ

- 32-pin, 400 mil SOJ

- 32-pin, TSOP II

• ESD protection ≥ 2000 volts

• Latch-up current ≥ 200 mA

Pin arrangement

32-pin TSOP II

A16

A15

A14

A13

I/O7

I/O6

GND

Logic block diagram

I/O0

I/O1

GND

I/O2

I/O3

GND

I/O5

I/O4

A12

A11

A10

Input buffer

I/O7

I/O0

512

×256×8

Array

(1,048,576)

32-pin SOJ (300 mil)

32-pin SOJ (400 mil)

A16

A15

A14

A13

I/O7

I/O0

I/O1

Control

circuit

Column decoder

I/O6

GND

I/O2

I/O3

I/O5

I/O4

A12

A11

A10

Selection guide

AS7C1025A-10

AS7C31025A-10 AS7C31025A-12

AS7C1025A-12

AS7C1025A-15

AS7C31025A-15

AS7C1025A-20

AS7C31025A-20

Unit

Maximum address access time

Maximum output enable access

time

Maximum

operating

current

AS7C1025A

AS7C31025A

AS7C1025A

AS7C31025A

120

110

100

Maximum

CMOS standby

current

2/6/01; V.0.9

Alliance Semiconductor

P. 1 of 8

12 3 4 5 6 7 8

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与AS7C1025A相关器件

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AS7C1025A-10TJC	ALSC	获取价格	5V/3.3V 128K X 8 CMOS SRAM (Revolutionary pinout)
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AS7C1025A-12	ALSC	获取价格	SRAM
AS7C1025A-12JC	ALSC	获取价格	5V/3.3V 128K X 8 CMOS SRAM (Revolutionary pinout)