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AS7C1024-12HC PDF预览

AS7C1024-12HC

更新时间: 2024-11-03 03:23:15
品牌 Logo 应用领域
ALSC 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
9页 209K
描述
Standard SRAM, 128KX8, 12ns, CMOS, PDSO32, 8 X 13.40 MM, STSOP1-32

AS7C1024-12HC 数据手册

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October 2000  
AS7C1024  
AS7C31024  
®
5V/3.3V 128K×8 CMOS SRAM (Evolutionary Pinout)  
Features  
• AS7C1024 (5V version)  
• 2.0V data retention  
• Easy memory expansion with CE1, CE2, OE inputs  
• TTL/LVTTL-compatible, three-state I/O  
• 32-pin JEDEC standard packages  
- 300 mil SOJ  
- 400 mil SOJ  
- 8 × 20mm TSOP I  
- 8 × 13.4 mm sTSOP I  
• ESD protection 2000 volts  
• Latch-up current 200 mA  
• AS7C31024 (3.3V version)  
• Industrial and commercial temperatures  
• Organization: 131,072 words × 8 bits  
• High speed  
- 10/12/15/20 ns address access time  
- 5/6/8/10 ns output enable access time  
• Low power consumption: ACTIVE  
- 825 mW (AS7C1024) / max @ 12 ns  
- 360 mW (AS7C31024) / max @ 12 ns  
• Low power consumption: STANDBY  
- 55 mW (AS7C1024) / max CMOS  
- 36 mW (AS7C31024) / max CMOS  
Logic block diagram  
Pin arrangement  
32-pin SOJ (300 mil)  
32-pin SOJ (400 mil)  
32-pin TSOP I and sTSOP I  
(8 x 20mm and 8 x 13.4mm)  
VCC  
GND  
A11  
A9  
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
16  
OE  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
V
A15  
CE2  
NC  
A16  
A14  
A12  
A7  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
I/O0  
I/O1  
I/O2  
GND  
1
2
3
4
5
6
7
8
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
CC  
A10  
CE1  
I/O7  
I/O6  
I/O5  
I/O4  
I/O3  
GND  
I/O2  
I/O1  
I/O0  
A0  
Input buffer  
A8  
A13  
WE  
CE2  
A15  
WE  
A13  
A0  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
A8  
I/O7  
I/O0  
V
A9  
CC  
NC  
A16  
A14  
A12  
A7  
A11  
512×256×8  
9
OE  
A10  
Array  
(1,048,576)  
10  
11  
12  
13  
14  
15  
16  
CE1  
I/O7  
I/O6  
I/O5  
I/O4  
I/O3  
A6  
A1  
18  
17  
A5  
A2  
A4  
A3  
WE  
Column decoder  
Control  
circuit  
OE  
CE1  
CE2  
Selection guide  
AS7C1024-10 AS7C1024-12 AS7C1024-15 AS7C1024-20  
AS7C31024-10 AS7C31024-12 AS7C31024-15 AS7C31024-20 Unit  
Maximum address access time  
Maximum output enable access time  
10  
5
12  
6
15  
8
20  
10  
ns  
ns  
AS7C1024  
AS7C31024  
AS7C1024  
AS7C31024  
150  
100  
10  
140  
90  
10  
10  
125  
80  
10  
10  
110  
75  
15  
mA  
mA  
mA  
mA  
Maximum operating current  
Maximum CMOS standby current  
10  
15  
Shaded areas contain advance information.  
10/18/00  
ALLIANCE SEMICONDUCTOR  
1
Copyright ©2000 Alliance Semiconductor. All rights reserved.  

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