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AS7C1024-12

更新时间: 2024-11-01 22:05:51
品牌 Logo 应用领域
ALSC 静态存储器
页数 文件大小 规格书
9页 199K
描述
5V/3.3V 128K x 8 CMOS SRAM (Evolutionary Pinout)

AS7C1024-12 数据手册

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November 2000  
AS7C1024  
AS7C31024  
®
5V/ 3.3V 128K×8 CMOS SRAM (Evolutionary Pinout)  
Features  
AS7C1024 (5V version)  
• 2.0V data retention  
Easy memory expansion with CE1, CE2, OE inputs  
AS7C31024 (3.3V version)  
• Industrial and commercial temperatures  
• Organization: 131,072 words × 8 bits  
• High speed  
- 10/ 12/ 15/ 20 ns address access time  
- 5/ 6/ 8/ 10 ns output enable access time  
Low power consumption: ACTIVE  
- 825 mW (c) / max @ 12 ns  
- 360 mW (AS7C31024) / max @ 12 ns  
Low power consumption: STANDBY  
- 55 mW (AS7C1024) / max CMOS  
- 36 mW (AS7C31024) / max CMOS  
• TTL/ LVTTL-compatible, three-state I/ O  
• 32-pin JEDEC standard packages  
- 300 mil SOJ  
- 400 mil SOJ  
- 8 × 20mm TSOPI  
- 8 × 13.4 mm sTSOP I  
ESD protection 2000 volts  
Latch-up current 200 mA  
Logic block diagram  
Pin arrangement  
32-pin SOJ (300 mil)  
32-pin SOJ (400 mil)  
32-pin TSOP I  
(8 x 20mm)  
V
CC  
GND  
A11  
A9  
1
OE  
A10  
CE1  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
V
A15  
CE2  
NC  
A16  
A14  
A12  
A7  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
I/ O0  
I/ O1  
I/ O2  
GND  
1
2
3
4
5
6
7
8
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
CC  
2
Input buffer  
3
A8  
4
A13  
WE  
CE2  
A15  
I/ O7  
I/ O6  
I/ O5  
I/ O4  
I/ O3  
GND  
I/ O2  
I/ O1  
I/ O0  
A0  
5
WE  
A13  
6
A0  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
7
A8  
I/ O7  
I/ O0  
8
V
A9  
CC  
9
NC  
A16  
A14  
A12  
A7  
A11  
512  
×256×8  
10  
11  
12  
13  
14  
15  
16  
9
OE  
A10  
Array  
(1,048,576)  
10  
11  
12  
13  
14  
15  
16  
CE1  
I/ O7  
I/ O6  
I/ O5  
I/ O4  
I/ O3  
A6  
A1  
18  
17  
A5  
A2  
A4  
A3  
WE  
Column decoder  
Control  
circuit  
OE  
CE1  
CE2  
Selection guide  
AS7C1024-12 AS7C1024-15 AS7C1024-20  
AS7C31024-12 AS7C31024-15 AS7C31024-20 Unit  
AS7C1024-10  
AS7C31024-10  
Maximum address access time  
Maximum output enable access time  
10  
5
12  
6
15  
8
20  
10  
ns  
ns  
AS7C1024  
AS7C31024  
AS7C1024  
AS7C31024  
150  
100  
10  
140  
90  
10  
10  
125  
80  
10  
10  
110  
75  
15  
mA  
mA  
mA  
mA  
Maximum operating current  
Maximum CMOS standby current  
10  
15  
Shaded areas contain advance information.  
11/ 29/ 00  
ALLIANCE SEMICONDUCTOR  
1
Copyright ©2000 Alliance Semiconductor. All rights reserved.  

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