Advance Information
June 2000
AS6UA51216
1.65V to 3.6V 512K×16 Intelliwatt™ low power CMOS SRAM with one chip enable
• Low power consumption: STANDBY
- 72 µW max at 3.6V
Features
• AS6UA51216
- 41 µW max at 2.7V
• Intelliwatt™ active power circuitry
• Industrial and commercial temperature ranges available
• Organization: 524,288 words × 16 bits
• 2.7V to 3.6V at 55 ns
• 2.3V to 2.7V at 70 ns
• 1.65V to 2.3V at 100 ns
- 28 µW max at 2.3V
• 1.2V data retention
• Equal access and cycle times
• Easy memory expansion with CS, OE inputs
• Smallest footprint packages
- 48-ball FBGA
- 400-mil 44-pin TSOP II
• ESD protection ≥ 2000 volts
• Latch-up current ≥ 200 mA
• Low power consumption: ACTIVE
- 144 mW at 3.6V and 55 ns
- 68 mW at 2.7V and 70 ns
- 28 mW at 2.3 V and 100 ns
Logic block diagram
Pin arrangement (top view)
44-pin 400-mil TSOP II
A0
A1
A2
V
A4
A3
1
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
DD
2
A6
A2
3
A7
512K × 16
A3
V
SS
A1
4
OE
A4
Array
(8,388,608)
A0
5
UB
A6
CS
6
LB
A7
A8
I/ O16
I/ O15
I/ O14
I/ O13
I/ O1
I/ O2
I/ O3
I/ O4
7
8
A12
A13
9
10
11
12
13
14
15
16
17
V
V
CC
SS
CC
I/ O1–I/ O8
I/ O9–I/ O16
I/ O
Control circuit
V
V
SS
buffer
I/ O5
I/ O6
I/ O7
I/ O12
I/ O11
I/ O10
I/ O9
A8
Column decoder
WE
I/ O
8
WE
A18
A17
A16
A15
A14
1
8
A9
19
20
21
22
A10
A11
UB
OE
LB
CS
A12
A13
Note: A “MODE” pad is to be placed between pins 33 and 34 and 11 and 12,
shorted. The bonding of this pad to V or V configures the device. There should
CC SS
only be 44+2+2 pads on the chip. Two extra V to separate out Array from
CC
Peripheral and Two-Mode Pads.
48-CSP Ball-Grid-Array Package
1
2
3
4
5
6
A
B
C
D
E
LB
OE
A0
A3
A1
A4
A2
NC
I/ O9 UB
CS I/ O1
I/ O10 I/ O11 A5
VSS I/ O12 A17
A6 I/ O2 I/ O3
A7 I/ O4 VCC
VCC I/ O13 VSS A16 I/ O5 VSS
I/ O15 I/ O14 A14 A15 I/ O6 I/ O7
I/ O16 NC A12 A13 WE I/ O8
F
G
H
A18
A8
A9
A10 A11
NC
Selection guide
VCC Range
Power Dissipation
Operating (ICC1
)
Standby (ISB2)
Min
(V)
Typ2
(V)
Max
Speed
(ns)
Product
(V)
3.6
2.7
2.3
Max (mA)
Max (µA)
AS6UA51216
AS6UA51216
AS6UA51216
2.7
2.3
3.0
2.5
2.0
55
70
2
1
1
20
15
12
1.65
100
6/ 27/ 00
ALLIANCE SEMICONDUCTOR
1
Copyright ©2000 Alliance Semiconductor. All rights reserved.