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AS5C512K8EC-20LE/IT PDF预览

AS5C512K8EC-20LE/IT

更新时间: 2024-10-28 06:37:55
品牌 Logo 应用领域
AUSTIN 内存集成电路静态存储器
页数 文件大小 规格书
17页 229K
描述
512K x 8 SRAM HIGH SPEED SRAM with REVOLUTIONARY PINOUT

AS5C512K8EC-20LE/IT 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:SON, SOLCC36,.45Reach Compliance Code:unknown
风险等级:5.92最长访问时间:20 ns
I/O 类型:COMMONJESD-30 代码:R-XDSO-N36
JESD-609代码:e0内存密度:4194304 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
端子数量:36字数:524288 words
字数代码:512000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:512KX8输出特性:3-STATE
封装主体材料:CERAMIC封装代码:SON
封装等效代码:SOLCC36,.45封装形状:RECTANGULAR
封装形式:SMALL OUTLINE并行/串行:PARALLEL
电源:5 V认证状态:Not Qualified
最大待机电流:0.0045 A最小待机电流:2 V
子类别:SRAMs最大压摆率:0.18 mA
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:NO LEAD
端子节距:1.27 mm端子位置:DUAL
Base Number Matches:1

AS5C512K8EC-20LE/IT 数据手册

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SRAM  
AS5C512K8  
Austin Semiconductor, Inc.  
PIN ASSIGNMENT  
512K x 8 SRAM  
HIGH SPEED SRAM with  
(Top View)  
REVOLUTIONARY PINOUT  
36-Pin SOJ (DJ, ECJ & SOJ)  
36-Pin CLCC (EC)  
AVAILABLE AS MILITARY  
SPECIFICATIONS  
•SMD 5962-95600  
•SMD 5962-95613  
•MIL-STD-883  
FEATURES  
• Ultra High Speed Asynchronous Operation  
• Fully Static, No Clocks  
• Multiple center power and ground pins for improved  
noise immunity  
• Easy memory expansion with CE\ and OE\  
options  
• All inputs and outputs are TTL-compatible  
• Single +5V Power Supply +/- 10%  
• Data Retention Functionality Testing  
• Cost Efficient Plastic Packaging  
• Extended Testing Over -55ºC to +125ºC for plastics  
• Plastic 36 pin PSOJ is fully compatible with the  
Ceramic 36 pin SOJ and offered in lead free finish  
• 3.3V Future Offering  
36-Pin Flat Pack (F)  
OPTIONS  
• Timing  
MARKING  
12ns access  
15ns access  
17ns access  
20ns access  
25ns access  
35ns access  
45ns access  
-12  
-15  
-17  
-20  
-25  
-35  
-45  
• Operating Temperature Ranges  
Full Military (-55oC to +125oC)  
Military (-55oC to +125oC)  
Industrial (-40oC to +85oC)  
/883C  
XT  
IT  
GENERAL DESCRIPTION  
The AS5C512K8 is a high speed SRAM. It offers flexibility in  
high-speed memory applications, with chip enable (CE\) and output  
enable (OE\) capabilities. These features can place the outputs in  
High-Z for additional flexibility in system design.  
• Package(s)  
Ceramic LCC  
EC  
F
DJ  
Ceramic Flatpack  
Plastic SOJ (Lead Free)*  
Ceramic SOJ (attached formed lead) ECJ  
Ceramic SOJ SOJ  
* Pb finish also available, contact factory  
Writing to these devices is accomplished when write enable (WE\)  
and CE\ inputs are both LOW. Reading is accomplished when WE\  
remains HIGH and CE\ and OE\ go LOW.  
As a option, the device can be supplied offering a reduced power  
standby mode, allowing system designers to meet low standby power  
requirements. This device operates from a single +5V power supply  
and all inputs and outputs are fully TTL-compatible.  
• 2V data retention/low power  
L
The AS5C512K8DJ offers the convenience and reliability of the  
AS5C512K8 SRAM and has the cost advantage of a durable plastic.  
The AS5C512K8DJ is footprint compatible with 36 pin CSOJ  
package of the SMD 5692-95600.  
For more products and information  
please visit our web site at  
www.austinsemiconductor.com  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS5C512K8  
Rev. 7.0 05/08  
1

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