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AS5C1008DJ-25/IT PDF预览

AS5C1008DJ-25/IT

更新时间: 2024-09-16 20:25:31
品牌 Logo 应用领域
MICROSS 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
9页 115K
描述
Cache SRAM, 128KX8, 25ns, CMOS, PDSO32, PLASTIC, SOJ-32

AS5C1008DJ-25/IT 数据手册

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SRAM  
AS5C1008  
Austin Semiconductor, Inc.  
128K x 8 SRAM  
PIN ASSIGNMENT  
RUGGEDIZED PLASTIC  
(TopView)  
HIGH SPEED SRAM  
32-Pin Plastic SOJ (DJ)  
FEATURES  
• Access times of 15, 20 and 25 ns  
NC  
A6  
1
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
Vcc  
• Fast output enable (t ) for cache applications  
2
A7  
AOE  
A5  
3
CE2  
WE\  
A8  
• Low active power  
A4  
4
• Low standby power  
A3  
5
• Fully static operation, no clock or refresh required  
• TTL Compatible Inputs and Outputs  
• Single +5V power supply  
A2  
6
A9  
A1  
7
A10  
A11  
OE\  
A12  
CE\1  
I/O7  
I/O6  
I/O5  
I/O4  
I/O3  
A0  
8
• Package in Industry-standard 32-pin SOJ  
A16  
A15  
A14  
A13  
I/O0  
I/O1  
I/02  
Vss  
9
10  
11  
12  
13  
14  
15  
16  
OPTIONS  
• Timing  
MARKING  
15ns access  
20ns access  
25ns access  
-15  
-20  
-25  
• Package  
Plastic SOJ*  
DJ  
No. 905  
• Operating Temperature Ranges  
-Military (-55oC to +125oC)  
-Industrial (-40oC to +85oC)  
PIN FUNCTIONS  
XT  
IT  
A0 - A16  
Address Inputs  
WE\  
Write Enable  
GENERAL DESCRIPTION  
Chip Enable  
CE\1, CE2  
OE\  
The ASI AS5C1008 is a high speed, low power, 128K by  
8-bit ruggedized plastic (COTS) CMOS Static RAM. It is fabri-  
cated using high performance, CMOS technology. This highly  
reliable process coupled with innovative circuit design tech-  
niques, yields access times as fast as 15ns (Max) over the  
military and industrial temperature ranges.  
When Chip Enable (CE\) is HIGH, the device assumes a  
standby mode at which the power dissipation can be reduced  
down to 125mW (max) at CMOS input levels.  
Output Enable  
Data Inputs/Outputs  
I/O0 - I/O7  
Power  
VCC  
Ground  
VSS  
NC  
No Connection  
Easy memory expansion is provided by using asserted LOW  
CE\ and asserted HIGH CE2, and asserted LOW write enable  
(WE\) controls both writing and reading of the memory.  
TheAS5C1008 is pin-compatible with other 128K x 8  
SRAM's in the SOJ package.  
For more products and information  
please visit our web site at  
www.austinsemiconductor.com  
*For ceramic versions of this product, please see the  
MT5C1008 datasheet.  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS5C1008  
Rev. 3.5 1/01  
1

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