Datasheet > AS4C16M16S-7BCN

AS4C16M16S-7BCN

更新时间： 2024-11-07 01:00:39

品牌	Logo	应用领域
ALSC		/
页数	文件大小	规格书
54页	2323K
描述
Programmable Mode registers

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中文翻译

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数据手册

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AS4C16M16S-7BCN 数据手册

AS4C16M16S

16M x 16 bit Synchronous DRAM (SDRAM)

Confidential

Features

Advanced (Rev. 1.4, Feb. /2012)

Overview

The 256Mb SDRAM is a high-speed CMOS

Fast access time from clock: 5.4/5.4 ns

Fast clock rate: 166/143 MHz

Fully synchronous operation

Internal pipelined architecture

4M word x 16-bit x 4-bank

Programmable Mode registers

- CAS Latency: 2, or 3

- Burst Length: 1, 2, 4, 8, or full page

- Burst Type: Sequential or Interleaved

- Burst stop function



synchronous DRAM containing 256 Mbits. It is

internally configured as 4 Banks of 4M word x 16

DRAM with a synchronous interface (all signals are

registered on the positive edge of the clock signal,

CLK). Read and write accesses to the SDRAM are

burst oriented; accesses start at a selected location

and continue for a programmed number of locations in

a programmed sequence. Accesses begin with the

registration of a BankActivate command which is then

followed by a Read or Write command.

The SDRAM provides for programmable Read or

Write burst lengths of 1, 2, 4, 8, or full page, with a

burst termination option. An auto precharge function

may be enabled to provide a self-timed row precharge

that is initiated at the end of the burst sequence. The

refresh functions, either Auto or Self Refresh are easy

to use. By having a programmable mode register, the

system can choose the most suitable modes to

maximize its performance. These devices are well

suited for applications requiring high memory

bandwidth and particularly well suited to high

performance PC applications.

Auto Refresh and Self Refresh

8192 refresh cycles/64ms

CKE power down mode

Single +3.3V power supply

Interface: LVTTL

Operating temperature range

- Commercial (0 ~ 70°C)



- Industrial (-40 ~ 85°C)

- Automotive (-40 ~ 105°C)

54-pin 400 mil plastic TSOP II package

54-ball 8.0 x 8.0 x 1.2mm (max) FBGA package



All parts fully ROHS Compliant

Table 1. Key Specifications

AS4C16M16S

-6/7

tCK3

tAC3

tRAS

tRC

Clock Cycle time (min.)

Access time from CLK (max.)

Row Active time (min.)

Row Cycle time (min.)

6/7 ns

5.4/5.4 ns

42/49 ns

60/63 ns

Table 2. Ordering Information

Part Number

Frequency

143 MHz

166 MHz

143 MHz

166 MHz

Package

AS4C16M16S-7TCN

AS4C16M16S-6TCN

AS4C16M16S-6TIN

AS4C16M16S-6BIN

AS4C16M16S-7BCN

AS4C16M16S-6TAN

T : indicates TSOP II package

B : indicates TFBGA package

54 pin TSOP II

54 ball TFBGA

54 pin TSOP II

N : indicates Pb free and Halogen free – ROHS compliant parts

C: Commercial I: Industrial A: Automotive temperatures

Confidential

Rev 3

Feb. 2014

12 3 4 5 6 7...54

中文翻译

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与AS4C16M16S-7BCN相关器件

型号	品牌	获取价格	描述	数据表
AS4C16M16S-7TCN	ALLIED	获取价格	16MX16 SYNCHRONOUS DRAM, 5.4ns, PDSO54, 0.400 INCH, HALOGEN FREE AND ROHS COMPLIANT, PLAST
AS4C16M16S-7TCN	ALSC	获取价格	Programmable Mode registers
AS4C16M16SA	ALSC	获取价格	Fully synchronous operation
AS4C16M16SA-6BIN	ALSC	获取价格	256M â (16Mx16bit) Synchronous DRAM (SDRAM)
AS4C16M16SA-6TCN	ALSC	获取价格	256M â (16Mx16bit) Synchronous DRAM (SDRAM)
AS4C16M16SA-6TIN	ALSC	获取价格	256M â (16Mx16bit) Synchronous DRAM (SDRAM)
AS4C16M16SA-7BCN	ALSC	获取价格	256M â (16Mx16bit) Synchronous DRAM (SDRAM)
AS4C16M16SA-7TCN	ALSC	获取价格	256M â (16Mx16bit) Synchronous DRAM (SDRAM)
AS4C16M16SA-CI	ALSC	获取价格	Operating temperature range
AS4C16M32MD1	ALSC	获取价格	Four internal banks for concurrent operation

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