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• 10,000 write/ erase cycle endurance
• Low power consumption
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• Organization:512K words × 8 bits
• Industrial and commercial temperature
• Sector architecture
- 30 mA maximum read current
- 60 mA maximum program current
- 400 µA typical standby current
• JEDEC standard software, packages and pinouts
- 32-pin TSOP
- 32-pin PLCC
• Detection of program/ erase cycle completion
- DQ7 DATApolling
- DQ6 toggle bit
• Erase suspend/ resume
- Supports reading data from or programming data to
a sector not being erased
- Eight 64K byte sectors
- Erase any combination of sectors or full chip
• Single 5.0±0.5V power supply for read/ write operations
• Sector protection
• High speed 55/ 70/ 90/ 120/ 150 ns address access time
• Automated on-chip programming algorithm
- Automatically programs/ verifies data at specified
address
• Automated on-chip erase algorithm
- Automatically preprograms/ erases chip or specified
sectors
• Low V write lock-out below 2.8V
CC
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3LQ#DUUDQJHPHQW
A11
1
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A9
2
A10
CE
Sector protect
DQ0–DQ7
switches
A8
3
V
A13
A14
A17
WE
4
DQ7
DQ6
DQ5
DQ4
DQ3
CC
5
V
SS
Erase voltage
generator
Input/ output
buffers
6
AS29F040
7
V
8
9
CC
A18
A16
A15
A12
A7
V
SS
Program/ erase
control
WE
10
11
12
13
14
15
16
DQ2
DQ1
DQ0
A0
32-pin PLCC
Program voltage
generator
Command
register
A12
4
A16
V
A17
CC
A6
A1
A15
3
A18
1
WE
A2
A5
A4
STB
Chip enable
Output enable
Logic
Data latch
A3
2
32 31 30
CE
OE
A7
5
29
28
27
26
25
24
23
22
21
A14
A13
A8
A6
A5
6
32-pin TSOP
7
A4
8
A9
AS29F040
Y decoder
Y gating
Cell matr
STB
A3
A11
OE
A10
CE
9
A2
10
11
12
13
V
detector
Timer
CC
A1
X decoder
A0
DQ0
DQ7
A0–A18
14 15 16 17 18 19 20
DQ1 DQ4 DQ6
V
SS
DQ2
DQ3
DQ5
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AS29F040-55 AS29F040-70 AS29F040-90 AS29F040-120 AS29F040-150 Unit
Maximum access time
tAA 55
tCE 55
70
70
30
90
90
35
120
120
50
150
150
55
ns
ns
ns
Maximum chip enable access time
Maximum output enable access time tOE 25
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