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AR3324P5L PDF预览

AR3324P5L

更新时间: 2024-11-02 17:15:35
品牌 Logo 应用领域
应能微 - APPLIED POWER 电视
页数 文件大小 规格书
4页 1118K
描述
Low Capacitance TVS

AR3324P5L 数据手册

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AR3324P5L  
4-Line Ultra Low Capacitance TVS Diode Array  
Description  
Mechanical Characteristics  
The AR3324P5L is an ultra low capacitance TVS array,  
utilizing leading monolithic silicon technology to provide  
fast response time and low ESD clamping voltage, mak-  
ing this device an ideal solution for protecting voltage  
sensitive high-speed data lines. The AR3324P5L com-  
plies with the IEC 61000-4-2 (ESD) with ±25kV air and  
±20kV contact discharge. It is assembled into a 10-pin  
2.5x1.0x0.5mm lead-free DFN package. The flow through  
style package allows for easy PCB layout and matched  
Package: DFN2510-10 (2.5×1.0×0.5mm)  
Lead Finish: Matte Tin  
Case Material: GreenMolding Compound.  
Terminal Connections: See Diagram Below  
Marking Information: See Below  
Applications  
HDMI 1.3 & 1.4, USB 2.0&3.0&3.1, and MDDI ports  
trace lengths necessary to maintain  
consistent imped-  
Monitors and flat panel displays  
Set-top box and Digital TV  
Video graphics cards  
ance between high speed differential lines such as USB  
3.1 and HDMI. The small size, ultra-low capacitance and  
high ESD surge protection make AR3324P5L an ideal  
choice to protect HDMI, MDDI, USB 3.0, USB3.1 and oth-  
er high speed ports.  
Digital Visual Interface (DVI)  
Notebook Computers  
PCI Express and Serial SATA Ports  
Features  
Ultra low leakage: nA level  
Operating voltage: 3.3V  
Marking Information  
Low clamping voltage  
Up to 4 lines protects  
Complies with following standards:  
– IEC 61000-4-2 (ESD) immunity test  
Air discharge: ±25kV  
332P = Device Marking Code  
Dot denotes Pin1  
332P  
Contact discharge: ±20kV  
– IEC61000-4-5 (Lightning) 3A (8/20μs)  
RoHS Compliant  
Ordering Information  
Dimensions and Pin Configuration  
Part Number  
Packaging  
Reel Size  
NC  
NC  
NC  
GND  
NC  
AR3324P5L 3000/Tape & Reel  
7 inch  
I/O_4  
GND  
I/O_3  
I/O_1 I/O_2  
Circuit and Pin Schematic  
Revision_1.0  
1 of 4  
www.appliedpowermicro.com  

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