Datasheet > AR3304P9

AR3304P9

更新时间： 2024-11-18 17:15:39

品牌	Logo	应用领域
应能微 - APPLIED POWER		电视
页数	文件大小	规格书
5页	1184K
描述
Low Capacitance TVS

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AR3304P9 数据手册

AR3304P9

4-Line TVS for Ethernet Interfaces

Description

Mechanical Characteristics



Package: DFN3020-10

The AR3304P9 is a low capacitance high power TVS,

utilizing leading monolithic silicon technology to provide

fast response time and low ESD clamping voltage, mak-

ing this device an ideal solution for protecting voltage

sensitive high-speed data lines. The AR3304P9 complies

with the IEC 61000-4-2 (ESD) with ±30kV air and ±30kV

contact discharge. It is assembled into a 10-pin DFN3020

-10 lead-free package. Each device will protect two line

pairs high-speed lines. The combination of small size, low

capacitance, and high surge capability makes them ideal

for use in applications such as Gigabit Ethernet, telecom-

munication lines, and LVDS interfaces.

Case Material: “Green” Molding Compound

Terminal Connections: See Diagram Below

Marking Information: See Below

Applications



LVDS Interfaces

10/100/1000 Ethernet

Notebooks, Desktops, Servers

Networking Equipment

Switching Systems

Audio/Video Inputs

Features

Marking Information



Low capacitance: 1.7pF typical (I/O to I/O)

Ultra low leakage: nA level

Operating voltage: 3.3V

Ultra low clamping voltage

Protects up to eight lines

3374N

YYWW

3374N = Device Marking Code

YYWW = Date Code

Complies with following standards:

– IEC 61000-4-2 (ESD) immunity test

Air discharge: ±30kV

Contact discharge: ±30kV

– IEC61000-4-5 (Lightning) 40A (8/20μs)



RoHS Compliant

Ordering Information

Part Number

Packaging

Reel Size

AR3304P9 3000/Tape & Reel

7 inch

Dimensions and Pin Configuration

Pin 1

Pin 4

LINE 1 In

LINE 3 In

Line 1 In

Line 2 In

Line 1 Out

GND

Pin 10

LINE 1 Out

Pin 2

Pin 7

LINE 3 Out

Pin 5

LINE 4 In

Line 2 Out

GND

LINE 2 In

GND

Line 3 In

Line 4 In

Line 3 Out

Line 4 Out

Pin 6

LINE 4 Out

Pin 9

LINE 2 Out

GND

Center Tabs

and Pins 3, 8

Pin Schematic

Circuit Schematic

Revision 1.1

1 of 5

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