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AP393

更新时间: 2024-11-26 21:54:11
品牌 Logo 应用领域
易亨 - ANACHIP 比较器
页数 文件大小 规格书
13页 260K
描述
Low Power Low Offset Voltage Dual Comparators

AP393 数据手册

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AP393  
Low Power Low Offset Voltage Dual Comparators  
„ Features  
„ General Description  
- Wide supply  
The AP393 consists of two independent precision  
voltage comparators with an offset voltage  
specification as low as 2.0 mV max for two  
comparators which were designed specifically to  
operate from a single power supply over a wide  
range of voltages. Operation from split power  
supplies is also possible and the low power supply  
current drain is independent of the magnitude of the  
power supply voltage. These comparators also  
have a unique characteristic in that the input  
common-mode voltage range includes ground,  
even though operated from a single power supply  
voltage.  
Voltage range: 2.0V to 36V  
Single or dual supplies: ±1.0V to ±18V  
- Very low supply current drain (0.4 mA) –  
independent of supply voltage  
- Low input biasing current: 25 nA  
- Low input offset current: ±5 nA  
- Maximum offset voltage: ±3 mV  
- Input common-mode voltage range includes  
ground  
- Differential input voltage range equal to the power  
supply voltage  
- Low output saturation voltage: 250 mV at 4 mA  
- Output voltage compatible with TTL, DTL, ECL,  
MOS and CMOS logic systems  
- 8-pin PDIP and SOP Pb-Free packages  
Application areas include limit comparators, simple  
analog to digital converters; pulse, squarewave and  
time delay generators; wide range VCO; MOS clock  
timers; multivibrators and high voltage digital logic  
gates. The AP393 is designed to directly interface  
with TTL and CMOS. When operated from both  
plus and minus power supplies, the AP393 will  
directly interface with MOS logic where their low  
power drain is a distinct advantage over standard  
comparators.  
„ Advantages  
- High precision comparators  
- Reduced VOS drift over temperature  
- Eliminates need for dual supplies  
- Allows sensing near ground  
- Compatible with all forms of logic  
- Power drain suitable for battery operation  
„ Pin Assignment  
(Top View)  
1
2
3
4
8
7
6
5
V+  
OUTPUT 1  
INVERTING INPUT 1  
NON-INVERTING INPUT 1  
GND  
OUTPUT 2  
INVERTING INPUT 2  
NON-INVERTING INPUT 2  
AP393  
SOP-8L/PDIP-8L  
„ Pin Descriptions  
Pin  
No.  
1
Pin  
Pin Name  
Description  
Channel 1 Output  
Pin Name  
Description  
No.  
OUTPUT 1  
INVERTING  
INPUT 1  
NON-INVERT  
ING INPUT 2  
INVERTING  
INPUT 2  
5
Channel 2 Positive Input  
2
Channel 1 Negative Input  
6
Channel 2 Negative Input  
NON-INVERT  
ING INPUT 1  
GND  
3
4
Channel 1 Positive Input  
Ground  
OUTPUT 2  
7
8
Channel 2 Output  
Vcc  
V+  
This datasheet contains new product information. Anachip Corp. reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of  
this product. No rights under any patent accompany the sale of the product.  
Rev. 1.0 Sep 7, 2004  
1/13  

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