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AP2302LMTR-E1 PDF预览

AP2302LMTR-E1

更新时间: 2024-11-30 04:06:23
品牌 Logo 应用领域
BCDSEMI 稳压器双倍数据速率
页数 文件大小 规格书
12页 140K
描述
2A DDR TERMINATION REGULATOR

AP2302LMTR-E1 数据手册

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Preliminary Datasheet  
2A DDR TERMINATION REGULATOR  
AP2302L  
General Description  
Features  
·
Support Both DDR I (1.25V ) and DDR II  
TT  
The AP2302L linear regulator is designed to meet the  
JEDEC specification SSTL-2 and SSTL-18 for termi-  
nation of DDR-SDRAM. The regulator can sink or  
source up to 2A current continuously, providing  
enough current for most DDR applications. Output  
voltage is designed to track the reference voltage  
within a ± 20mV tolerance for load regulation while  
preventing shooting through on the output stage. On-  
chip thermal limiting provides protection against a  
combination of high current and ambient temperature  
which would create an excessive junction temperature.  
(0.9V ) Requirements  
TT  
·
·
·
Source and Sink Current up to 2A  
High Accuracy Output Voltage at Full-load  
Adjustable V  
by External Resistors  
OUT  
·
Shutdown for Standby or Suspend Mode  
Operation with High-impedance Output  
Applications  
The AP2302L, used in conjunction with series termi-  
nation resistors, provides an excellent voltage source  
for active termination schemes of high speed transmis-  
sion lines as those seen in high speed memory buses  
and distributed backplane designs.  
·
·
·
DDR-SDRAM Termination  
DDR-II Termination  
SSTL-2 Termination  
The AP2302L is available in SOIC-8 and TO-252-5L  
packages.  
TO-252-5L  
SOIC-8  
Figure 1. Package Types of AP2302L  
Jul. 2006 Rev. 1. 2  
BCD Semiconductor Manufacturing Limited  
1

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