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AP0C51BH PDF预览

AP0C51BH

更新时间: 2024-11-17 23:14:15
品牌 Logo 应用领域
英特尔 - INTEL 微控制器
页数 文件大小 规格书
16页 231K
描述
CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER

AP0C51BH 数据手册

 浏览型号AP0C51BH的Datasheet PDF文件第2页浏览型号AP0C51BH的Datasheet PDF文件第3页浏览型号AP0C51BH的Datasheet PDF文件第4页浏览型号AP0C51BH的Datasheet PDF文件第5页浏览型号AP0C51BH的Datasheet PDF文件第6页浏览型号AP0C51BH的Datasheet PDF文件第7页 
80C31BH/80C51BH/87C51  
MCS 51  
É
CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER  
Automotive  
Y
Y
Extended Automotive Temperature  
Programmable Serial Port  
b
a
Range ( 40 C to 125 C Ambient)  
§
§
Y
TTL- and CMOS-Compatible Logic  
Levels  
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
High Performance CHMOS Process  
Power Control Modes  
Y
Y
Y
Y
Y
64K External Program Memory Space  
64K External Data Memory Space  
IDLE and POWER DOWN Modes  
4 Kbyte On-Chip ROM/EPROM  
128 x 8-bit RAM  
32 Programmable I/O Lines  
Two 16-Bit Timer/Counters  
5 Interrupt Sources  
ONCE Mode Facilitates System Testing  
Available in 12 MHz and 16 MHz  
Versions  
Y
Available in PLCC and DIP Packages  
Ý
(See Packaging Specification, Order 231369)  
Quick-Pulse EPROM Programming  
2-Level Program Memory Lock EPROM  
Boolean Processor  
The MCS 51 CHMOS microcontroller products are fabricated on Intel’s reliable CHMOS process and are  
É
functionally compatible with the standard MCS 51 HMOS microcontroller products. This technology combines  
the high speed and density characteristics of HMOS with the low power attributes of CHMOS. This combina-  
tion expands the effectiveness of the powerful MCS 51 microcontroller architecture and instruction set.  
Like the MCS 51 HMOS microcontroller versions, the MCS 51 CHMOS microcontroller products have the  
following features: 4 Kbytes of EPROM/ROM (87C51/80C51BH respectively); 128 bytes of RAM; 32 I/O lines;  
two 16-bit timer/counters; a five-source two-level interrupt structure; a full duplex serial port; and on-chip  
oscillator and clock circuitry. In addition, the MCS 51 CHMOS microcontroller products exhibit low operating  
power, along with two software selectable modes of reduced activity for further power reductionÐIdle and  
Power Down.  
The Idle mode freezes the CPU while allowing the RAM, timer/counters, serial port, and interrupt system to  
continue functioning. The Power Down mode saves the RAM contents but freezes the oscillator, causing all  
other chip functions to be inoperative.  
The 87C51 is the EPROM version of the 80C51BH. It contains 4 Kbytes of on-chip program memory that can  
be electrically programmed, and can be erased by exposure to ultraviolet light. The 87C51 EPROM array uses  
a modified Quick-Pulse Programming algorithm, by which the entire 4 Kbyte array can be programmed in about  
12 seconds.  
NOTICE:  
This datasheet contains information on products in full production. Specifications within this datasheet  
are subject to change without notice. Verify with your local Intel sales office that you have the latest  
datasheet before finalizing a design.  
*Other brands and names are the property of their respective owners.  
Information in this document is provided in connection with Intel products. Intel assumes no liability whatsoever, including infringement of any patent or  
copyright, for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products. Intel retains the right to make  
changes to these specifications at any time, without notice. Microcomputer Products may have minor variations to this specification known as errata.  
©
COPYRIGHT INTEL CORPORATION, 1995  
January 1995  
Order Number: 270419-007  

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