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AN31

更新时间: 2022-04-23 23:00:11
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芯科 - SILICON /
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INDUCTOR DESIGN FOR THE Si41XX SYNTHESIZER FAMILY

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AN31  
INDUCTOR DESIGN FOR THE Si41XX SYNTHESIZER FAMILY  
3.1. Using a Discrete “Chip” Inductor  
1. Introduction  
If the required value for L  
is greater than 3 nH, it is  
EXT  
Silicon Laboratories’ family of frequency synthesizers  
integrates VCOs, loop filters, reference and VCO  
dividers, and phase detectors in standard CMOS  
technology. Depending on the synthesizer being used,  
the frequency of operation may require an external  
inductance to establish the desired center frequency of  
operation. This may be implemented with either a  
printed circuit board (PCB) trace or a discrete “chip”  
inductor. This application note provides guidelines for  
designing these external inductors to ensure maximum  
manufacturing margin for frequency tuning.  
recommended that a discrete “chip” inductor be used.  
This inductor should be placed as close as possible to  
the device pins as shown in Figure 1.  
printed trace  
discrete  
inductor  
2. Determining LEXT  
J
inductor device pad  
The center frequency for many of Silicon Laboratories’  
frequency synthesizers is established using an external  
inductor. The value for this inductor is determined by  
Equations 1 and 2:  
synthesizer device pad  
Figure 1. Placement of Discrete  
“Chip” Inductor  
1
---------------------------------------------------------------  
fCEN  
=
(Equation 1)  
2π  
While close placement will minimize the inductance of  
the traces connecting the discrete inductor to the  
synthesizer, these traces, nonetheless, contribute to the  
total overall inductance.  
CNOM(LPKG + LEXT  
)
from which  
1
------------------------------------------  
The total external inductance includes contributions  
from both the discrete inductor and the connecting  
traces as indicated in Equation 3:  
LEXT  
=
LPKG  
(2πfCEN)2CNOM  
(Equation 2)  
where f  
= desired center frequency of synthesizer  
= nominal tank capacitance from  
synthesizer data sheet  
CEN  
(Equation 3)  
LEXT = LNOM + X(J + 0.3)  
C
NOM  
PKG  
EXT  
where  
L
L
= external inductance  
EXT  
L
L
= package inductance from synthesizer  
data sheet  
= nominal value of discrete “chip”  
NOM  
inductor  
= external inductance required  
X = constant of proportionality for MLP  
(X  
) or TSSOP (X  
) (nH/mm)  
MLP  
TSSOP  
3. Implementing LEXT  
J = dimension shown in Figure 1 (mm)  
Once the required value of external inductance is  
determined given the desired center frequency, a choice  
must be made regarding the implementation of the  
inductor. The two possible implementations are a  
discrete “chip” inductor or a printed circuit board trace.  
Note that the term “J + 0.3” is the effective D dimension  
used in the next section. Also, the determination of X is  
described in the next section.  
The discrete inductor should be selected such that the  
Q of the inductor is greater than 40, and the tolerance of  
the inductance is ±10% or better.  
Rev. 1.3 4/06  
Copyright © 2006 by Silicon Laboratories  
AN31  

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