Datasheet > AS1153_V2

AS1153_V2

更新时间： 2022-03-30 16:58:43

品牌	Logo	应用领域
艾迈斯 - AMSCO		/
页数	文件大小	规格书
16页	469K
描述
Dual LVDS Receiver

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Datasheet

AS1153, AS1157

Dual LVDS Receiver

1 General Description

2 Key Features

ꢀ

Flow-Through Pinout

The AS1153, AS1157 are dual flow-through LVDS (low-voltage differ-

ential signaling) receivers which accept LVDS differential inputs and

convert them to LVCMOS outputs. The receivers are perfect for low-

power low-noise applications requiring high signaling rates and

reduced EMI emissions.

Guaranteed 260Mbps Data Rate

300ps Pulse Skew (Max)

Conform to ANSI TIA/EIA-644 LVDS Standards

Single +3.3V Supply

The devices are guaranteed to receive data at speeds up to

260Mbps (130MHz) over controlled impedance media of approxi-

mately 100Ω. Supported transmission media are PCB traces, back-

planes, and cables.

Operating Temperature Range: -40°C to +85ºC

Failsafe Circuit

The AS1153, AS1157 features integrated parallel termination resis-

tors (nominally 107Ω), which eliminate the requirement for discrete

termination resistors, and reduce stub lengths. The AS1153, AS1157

uses high impedance inputs and requires an external termination

resistor when used in a point-to-point connection.

Integrated Termination (AS1157)

8-pin SOIC Package

The integrated Failsafe feature sets the output high if the inputs are

open, undriven and terminated, or undriven and shorted.

All inputs conform to the ANSI TIA/EIA- 644 LVDS standards. Flow-

through pinout simplifies PC board layout and reduces crosstalk by

separating the LVDS inputs and LVCMOS outputs.

3 Applications

Digital Copiers, Laser Printers, Cellular Phone Base Stations, Add/

Drop Muxes, Digital Cross-Connects, DSLAMs, Network Switches/

Routers, Backplane Interconnect, Clock Distribution Computers,

Intelligent Instruments, Controllers, Critical Microprocessors and

Microcontrollers, Power Monitoring, and Portable/Battery-Powered

Equipment.

The devices are available in a 8-pin SOIC package.

Figure 1. AS1153, AS1157 - Block Diagram

IN1-

VCC

IN1+

OUT1

AS1153/57

IN2+

IN2-

OUT2

GND

www.austriamicrosystems.com/Interfaces-LVDS/AS1153

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