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AM29F040B-120PDB PDF预览

AM29F040B-120PDB

更新时间: 2024-11-23 14:26:55
品牌 Logo 应用领域
飞索 - SPANSION 光电二极管内存集成电路
页数 文件大小 规格书
30页 417K
描述
Flash, 512KX8, 120ns, PDIP32, PLASTIC, DIP-32

AM29F040B-120PDB 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP,
针数:32Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.32.00.51
风险等级:5.43Is Samacsys:N
最长访问时间:120 ns其他特性:1000K PROGRAM/ERASE CYCLES; DATA RETENTION 20 YEARS
数据保留时间-最小值:20JESD-30 代码:R-PDIP-T32
JESD-609代码:e3长度:42.037 mm
内存密度:4194304 bit内存集成电路类型:FLASH
内存宽度:8功能数量:1
端子数量:32字数:524288 words
字数代码:512000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:512KX8封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE并行/串行:PARALLEL
峰值回流温度(摄氏度):260编程电压:5 V
认证状态:Not Qualified座面最大高度:5.715 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin (Sn)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40类型:NOR TYPE
宽度:15.24 mmBase Number Matches:1

AM29F040B-120PDB 数据手册

 浏览型号AM29F040B-120PDB的Datasheet PDF文件第2页浏览型号AM29F040B-120PDB的Datasheet PDF文件第3页浏览型号AM29F040B-120PDB的Datasheet PDF文件第4页浏览型号AM29F040B-120PDB的Datasheet PDF文件第5页浏览型号AM29F040B-120PDB的Datasheet PDF文件第6页浏览型号AM29F040B-120PDB的Datasheet PDF文件第7页 
Am29F040B  
4 Megabit (512 K x 8-Bit)  
CMOS 5.0 Volt-only, Uniform Sector Flash Memory  
DISTINCTIVE CHARACTERISTICS  
5.0 V ± 10% for read and write operations  
Embedded Algorithms  
— Minimizes system level power requirements  
— Embedded Erase algorithm automatically  
preprograms and erases the entire chip or any  
combination of designated sectors  
Manufactured on 0.32 µm process technology  
— Compatible with 0.5 µm Am29F040 device  
— Embedded Program algorithm automatically  
writes and verifies bytes at specified addresses  
High performance  
— Access times as fast as 55 ns  
Minimum 1,000,000 program/erase cycles per  
sector guaranteed  
Low power consumption  
20-year data retention at 125°C  
— Reliable operation for the life of the system  
Package options  
— 20 mA typical active read current  
— 30 mA typical program/erase current  
— 1 µA typical standby current (standard access  
time to active mode)  
— 32-pin PLCC, TSOP, or PDIP  
Flexible sector architecture  
— 8 uniform sectors of 64 Kbytes each  
— Any combination of sectors can be erased  
— Supports full chip erase  
Compatible with JEDEC standards  
— Pinout and software compatible with  
single-power-supply Flash standard  
— Superior inadvertent write protection  
— Sector protection:  
Data# Polling and toggle bits  
A hardware method of locking sectors to prevent  
any program or erase operations within that sector  
— Provides a software method of detecting  
program or erase cycle completion  
Erase Suspend/Erase Resume  
— Suspends a sector erase operation to read data  
from, or program data to, a non-erasing sector,  
then resumes the erase operation  
Publication# 21445 Rev: C Amendment/+2  
Issue Date: May 17, 1999  
This Data Sheet states AMD’s current technical specifications regarding the Products described herein. This Data  
Sheet may be revised by subsequent versions or modifications due to changes in technical specifications.  

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