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AM28F010A-200JC PDF预览

AM28F010A-200JC

更新时间： 2024-11-07 22:35:03
品牌 Logo 应用领域
超微 - AMD 闪存内存集成电路
页数 文件大小 规格书
35页 439K
描述
1 Megabit (128 K x 8-Bit) CMOS 12.0 Volt, Bulk Erase Flash Memory with Embedded Algorithms

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中文翻译

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AM28F010A-200JC 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：QFJ
包装说明：QCCJ, LDCC32,.5X.6针数：32
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.32.00.51风险等级：5.51
最长访问时间：200 ns其他特性：100K WRITE/ERASE CYCLES MIN
命令用户界面：YES数据轮询：YES
JESD-30 代码：R-PQCC-J32JESD-609代码：e0
内存密度：1048576 bit内存集成电路类型：FLASH
内存宽度：8功能数量：1
端子数量：32字数：131072 words
字数代码：128000工作模式：ASYNCHRONOUS
最高工作温度：70 °C最低工作温度：
组织：128KX8输出特性：3-STATE
封装主体材料：PLASTIC/EPOXY封装代码：QCCJ
封装等效代码：LDCC32,.5X.6封装形状：RECTANGULAR
封装形式：CHIP CARRIER并行/串行：PARALLEL
峰值回流温度（摄氏度）：NOT SPECIFIED电源：5 V
编程电压：12 V认证状态：Not Qualified
最大待机电流：0.0001 A子类别：Flash Memories
最大压摆率：0.03 mA最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：J BEND端子节距：1.27 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
切换位：YES类型：NOR TYPE
Base Number Matches：1

AM28F010A-200JC 数据手册

 浏览型号AM28F010A-200JC的Datasheet PDF文件第2页浏览型号AM28F010A-200JC的Datasheet PDF文件第3页浏览型号AM28F010A-200JC的Datasheet PDF文件第4页浏览型号AM28F010A-200JC的Datasheet PDF文件第5页浏览型号AM28F010A-200JC的Datasheet PDF文件第6页浏览型号AM28F010A-200JC的Datasheet PDF文件第7页 
FINAL  
Am28F010A  
1 Megabit (128 K x 8-Bit)  
CMOS 12.0 Volt, Bulk Erase Flash Memory with Embedded Algorithms  
■ Latch-up protected to 100 mA from  
DISTINCTIVE CHARACTERISTICS  
–1 V to VCC +1 V  
■ High performance  
■ Embedded Erase Electrical Bulk Chip Erase  
— Access times as fast as 70 ns  
■ CMOS low power consumption  
— 30 mA maximum active current  
— 100 µA maximum standby current  
— No data retention power consumption  
— 5 seconds typical chip erase, including  
pre-programming  
■ Embedded Program  
— 14 µs typical byte program, including time-out  
— 4 seconds typical chip program  
■ Compatible with JEDEC-standard byte-wide  
■ Command register architecture for  
microprocessor/microcontroller compatible  
write interface  
32-pin EPROM pinouts  
— 32-pin PDIP  
— 32-pin PLCC  
■ On-chip address and data latches  
— 32-pin TSOP  
■ Advanced CMOS flash memory technology  
— Low cost single transistor memory cell  
■ 100,000 write/erase cycles minimum  
■ Write and erase voltage 12.0 V ±5%  
■ Embedded algorithms for completely self-timed  
write/erase operations  
within this family that offer Embedded Algorithms use  
the same command set. This offers designers the flexi-  
bility to retain the same device footprint and command  
set, at any density between 256 Kbits and 2 Mbits.  
GENERAL DESCRIPTION  
The Am28F010A is a 1 Megabit Flash memory orga-  
nized as 128 Kbytes of 8 bits each. AMD’s Flash memo-  
ries offer the most cost-effective and reliable read/write  
non-volatile random access memory. The Am28F010A  
is packaged in 32-pin PDIP, PLCC, and TSOP versions.  
It is designed to be reprogrammed and erased in-system  
or in standard EPROM programmers. The Am28F010A  
is erased when shipped from the factory.  
AMD’s Flash technology reliably stores memory con-  
tents even after 100,000 erase and program cycles. The  
AMD cell is designed to optimize the erase and program-  
ming mechanisms. In addition, the combination of  
advanced tunnel oxide processing and low internal elec-  
tric fields for erase and programming operations pro-  
duces reliable cycling. The Am28F010A uses a  
12.0±5% VPP input to perform the erase and program-  
ming functions.  
The standard Am28F010A offers access times of as fast  
as 70 ns, allowing high speed microprocessors to  
operate without wait states. To eliminate bus contention,  
the device has separate chip enable (CE#) and output  
enable (OE#) controls.  
The highest degree of latch-up protection is achieved  
with AMD’s proprietary non-epi process. Latch-up pro-  
tection is provided for stresses up to 100 mA on address  
and data pins from –1 V to VCC +1 V.  
AMD’s Flash memories augment EPROM functionality  
with in-circuit electrical erasure and programming. The  
Am28F010A uses a command register to manage this  
functionality. The command register allows for 100%  
TTL level control inputs and fixed power supply levels  
during erase and programming, while maintaining  
maximum EPROM compatibility.  
AMD’s Flash technology combines years of EPROM and  
EEPROM experience to produce the highest levels of  
quality, reliability, and cost effectiveness. The  
Am28F010A electrically erases all bits simultaneously  
using Fowler-Nordheim tunneling. The bytes are  
programmed one byte at a time using the EPROM pro-  
gramming mechanism of hot electron injection.  
The Am28F010A is compatible with the AMD  
Am28F256A, Am28F512A, and Am28F020A Flash  
memories. All devices in the Am28Fxxx family follow the  
JEDEC 32-pin pinout standard. In addition, all devices  
Publication# 16778 Rev: D Amendment/+2  
Issue Date: May 1998  
1234567...35

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