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AM26LS32PCG PDF预览

AM26LS32PCG

更新时间： 2024-11-27 13:05:31
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 输出元件接收机
页数 文件大小 规格书
4页 83K
描述
QUAD LINE RECEIVER, PDIP16, LEAD FREE, PLASTIC, DIP-16

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中文翻译

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AM26LS32PCG 技术参数

生命周期：Obsolete零件包装代码：DIP
包装说明：DIP,针数：16
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.04
Is Samacsys：N输入特性：DIFFERENTIAL SCHMITT TRIGGER
接口集成电路类型：LINE RECEIVER接口标准：EIA-422; EIA-423
JESD-30 代码：R-PDIP-T16长度：19.175 mm
功能数量：4端子数量：16
最高工作温度：70 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装代码：DIP
封装形状：RECTANGULAR封装形式：IN-LINE
认证状态：Not Qualified最大接收延迟：30 ns
接收器位数：4座面最大高度：4.44 mm
最大供电电压：5.25 V最小供电电压：4.75 V
标称供电电压：5 V表面贴装：NO
技术：BIPOLAR温度等级：COMMERCIAL
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL宽度：7.62 mm
Base Number Matches：1

AM26LS32PCG 数据手册

 浏览型号AM26LS32PCG的Datasheet PDF文件第2页浏览型号AM26LS32PCG的Datasheet PDF文件第3页浏览型号AM26LS32PCG的Datasheet PDF文件第4页 
Order this document by AM26LS32/D  
QUAD EIA–422/3 LINE  
RECEIVER WITH  
THREE–STATE OUTPUTS  
Motorola′s Quad EIA–422/3 Receiver features four independent receiver  
chains which comply with EIA Standards for the Electrical Characteristics of  
Balanced/Unbalanced Voltage Digital Interface Circuits. Receiver outputs  
are 74LS compatible, three–state structures which are forced to a high  
impedance state when Pin 4 is a Logic “0” and Pin 12 is a Logic “1.” A PNP  
device buffers each output control pin to assure minimum loading for either  
Logic “1” or Logic “0” inputs. In addition, each receiver chain has internal  
hysteresis circuitry to improve noise margin and discourage output instability  
for slowly changing input waveforms. A summary of AM26LS32 features  
include:  
SEMICONDUCTOR  
TECHNICAL DATA  
D SUFFIX  
PLASTIC PACKAGE  
CASE 751B  
• Four Independent Receiver Chains  
• Three–State Outputs  
(SO–16)  
• High Impedance Output Control Inputs  
(PIA Compatible)  
• Internal Hysteresis – 30 mV (Typical) @ Zero Volts Common Mode  
• Fast Propagation Times – 25 ns (Typical)  
• TTL Compatible  
PC SUFFIX  
PLASTIC PACKAGE  
CASE 648  
• Single 5.0 V Supply Voltage  
• Fail–Safe Input–Output Relationship. Output Always High When Inputs  
Are Open, Terminated or Shorted  
• 6.0 k Minimum Input Impedance  
PIN CONNECTIONS  
V
1
2
3
4
5
6
7
8
16  
15  
14  
–
+
CC  
Representative Block Diagram  
Inputs A  
–
+
Inputs B  
Three–State  
Outputs A  
Differential  
Inputs  
Control  
Inputs  
3–State  
Control  
Output  
13 Output B  
3–State  
12  
Output C  
Control  
Output D  
Inputs D  
11  
10  
9
+
–
Inputs C  
Input  
Network  
+
–
GND  
Level  
Translator  
Amplifier  
Hysteresis  
ORDERING INFORMATION  
Operating  
Level  
Translator  
Amplifier  
Temperature Range  
Device  
Package  
AM26LS32PC  
MC26LS32D*  
Plastic DIP  
SO–16  
T
A
= 0 to 70°C  
* Note that the surface mount MC26LS32D device uses the same die as in the plastic DIP  
* AM26LS32DC device, but with an MC prefix to prevent confusion with the package suffix.  
Motorola, Inc. 1995  
1234

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