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A6809SLW PDF预览

A6809SLW

更新时间: 2024-01-16 22:41:32
品牌 Logo 应用领域
急速微 - ALLEGRO 驱动器输入元件
页数 文件大小 规格书
8页 151K
描述
DABiC-IV, 10-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS

A6809SLW 数据手册

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6810 AND  
6809  
DABiC-IV, 10-BIT SERIAL-INPUT,  
LATCHED SOURCE DRIVERS  
The A6809– and A6810– devices combine 10-bit CMOS shift  
registers, accompanying data latches and control circuitry with bipolar  
sourcing outputs and pnp active pull downs. Designed primarily to  
drive vacuum-fluorescent displays, the 60 V and -40 mA output ratings  
also allow these devices to be used in many other peripheral power  
driver applications. The A6809– and A6810– feature an increased data  
input rate (compared with the older UCN/UCQ5810-F) and a con-  
trolled output slew rate. The A6809xLW and A6810xLW are identical  
except for pinout.  
A6810xA  
18 OUT  
17 OUT  
1
2
3
4
OUT  
OUT  
OUT  
9
8
7
6
10  
SERIAL  
DATA OUT  
16  
15  
14  
LATCHES  
REGISTER  
LOAD  
SUPPLY  
The CMOS shift register and latches allow direct interfacing with  
microprocessor-based systems. With a 3.3 V or 5 V logic supply,  
typical serial-data input rates are up to 33 MHz.  
CLK  
V
BB  
CLOCK  
SERIAL  
DATA IN  
GROUND  
5
6
REGISTER  
LATCHES  
LOGIC  
SUPPLY  
V
BLNK 13 BLANKING  
A CMOS serial data output permits cascade connections in applica-  
tions requiring additional drive lines. Similar devices are avail-able as  
the A6811– (12 bits), A6812– (20 bits), and A6818– (32 bits).  
DD  
12 OUT  
7
8
ST  
STROBE  
1
11 OUT  
OUT  
5
2
The A6809– and A6810– output source drivers are npn Darling-  
tons, capable of sourcing up to 40 mA. The controlled output slew rate  
reduces electromagnetic noise, which is an important consideration in  
systems that include telecommunications and/or microprocessors and  
to meet government emissions regulations. For inter-digit blanking, all  
output drivers can be disabled and all sink drivers turned on with a  
BLANKING input high. The pnp active pull-downs will sink at least  
2.5 mA.  
9
10 OUT  
OUT  
4
3
Dwg. PP-029  
All devices are available in two temperature ranges for optimum  
performance in commercial (suffix S-) or industrial (suffix E-) applica-  
tions. The A6810– is provided in three package styles for through-hole  
DIP (suffix -A), surface-mount SOIC (suffix -LW), or minimum-area  
surface-mount PLCC (suffix -EP). The A6809– is provided in the  
SOIC (suffix -LW) only. Copper lead frames, low logic-power dissi-  
pation, and low output-saturation voltages allow all devices to source  
25 mA from all outputs continuously over the maximum operating  
temperature range.  
ABSOLUTE MAXIMUM RATINGS  
at TA = 25°C  
Logic Supply Voltage, VDD ................... 7.0 V  
Driver Supply Voltage, VBB ................... 60 V  
Continuous Output Current Range,  
I
OUT ......................... -40 mA to +15 mA  
Input Voltage Range,  
VIN ....................... -0.3 V to VDD + 0.3 V  
Package Power Dissipation,  
PD ........................................ See Graph  
Operating Temperature Range, TA  
(Suffix ‘E–’) .................. -40°C to +85°C  
(Suffix ‘S–’) .................. -20°C to +85°C  
Storage Temperature Range,  
TS ............................... -55°C to +125°C  
FEATURES  
I Controlled Output Slew Rate  
I High-Speed Data Storage  
I 60 V Minimum  
I Low Output-Saturation Voltages  
I Low-Power CMOS Logic  
and Latches  
Output Breakdown  
I High Data Input Rate  
I PNP Active Pull-Downs  
I Improved Replacements  
for TL4810, UCN5810,  
and UCQ5810–  
Caution: These CMOS devices have input  
static protection (Class 2) but are still  
susceptible to damage if exposed to  
extremely high static electrical charges.  
Complete part number includes a suffix to identify operating  
temperature range (E- or S-) and package type (-A, -EP, or -LW).  
Always order by complete part number, e.g., A6810SLW .  

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