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A6280_V

更新时间: 2024-01-26 14:34:50
品牌 Logo 应用领域
急速微 - ALLEGRO 驱动器
页数 文件大小 规格书
13页 327K
描述
3-Channel Constant-Current LED Driver with Programmable PWM Control

A6280_V 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:QFN
包装说明:HQCCN, LCC16,.12SQ,20针数:16
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.81
数据输入模式:SERIAL显示模式:DOT MATRIX
接口集成电路类型:LED DISPLAY DRIVERJESD-30 代码:S-XQCC-N16
JESD-609代码:e3长度:3 mm
湿度敏感等级:1复用显示功能:NO
功能数量:1区段数:3
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:UNSPECIFIED
封装代码:HQCCN封装等效代码:LCC16,.12SQ,20
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG
峰值回流温度(摄氏度):NOT SPECIFIED电源:5/17 V
认证状态:Not Qualified座面最大高度:0.8 mm
子类别:Display Drivers最大供电电压:17 V
最小供电电压:4.75 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3 mm最小 fmax:6 MHz
Base Number Matches:1

A6280_V 数据手册

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A6280  
3-Channel Constant-Current LED Driver  
with Programmable PWM Control  
Features and Benefits  
3 × 10-bit PWM brightness settings  
3 × 7-bit dot correction current settings  
5 to 17 V operation  
Description  
The A6280 is a 3-channel constant current LED driver that  
has a wide range of output currents. The A6280 controls LED  
brightness with a Pulse Width Modulation (PWM) scheme  
Wide output current range, 10 to 150 mA per channel  
Serial port/PWM clock operates at up to 5 MHz  
Data and clock logic architecture allows single  
microcontroller control of large quantities of serially-  
connected A6280s at fast data transfer rate  
Buffered logic outputs to drive cables  
Thermal shutdown and UVLO protection  
Power-On Reset  
that gives the application the capability of displaying a billion  
colors in an RGB cluster. The maximum current is set by an  
external resistor.  
The LED brightness is controlled by performing PWM control  
on the outputs. The brightness data of the PWM signal for  
each LED is stored in three 10-bit registers. The peak value  
for each LED can be adjusted (dot-corrected) to compensate  
for mismatch, aging, and temperature effects. All the internal  
latched registers are loaded by a 31-bit shift register. One  
address bit controls whether dot correction/clock divider ratio  
or brightness data is loaded into the registers. The remaining  
bits are used for the data. This helps reduce the pin count of  
the A6280. To further lower the A6280 pin count, the PWM  
clock and the serial bus clock share the same pin and work  
concurrently to control LED brightness and to load data.  
Packages: 16-pin DIP (suffix A), and  
16-contact QFN (suffix ES)  
TheA6280 is designed to minimize the number of components  
needed to drive LEDs with large pixel spacing.Alarge number  
of A6280s can be daisy chained together and controlled by  
just four control signals (clock, serial data, latch, and output  
enable). Each of these inputs has buffered outputs to drive  
the next chip in the chain. Also, VIN can be tied to the LED  
ES, approximate scale 1:1  
Continued on the next page…  
Application Diagram  
Power Supply Bus  
VLED  
VLED  
VIN OutR OutG OutB  
VIN OutR OutG OutB  
Clock  
Data  
Clock In  
Data In  
Latch In  
OE In  
Clock Out  
Data Out  
Latch Out  
OE Out  
Clock In  
Data In  
Latch In  
OE In  
Clock Out  
Data Out  
Latch Out  
OE Out  
Cat5 UTP  
Cat5 UTP  
Cat5 UTP  
Latch Enable  
Output Enable  
Microprocessor  
REXT  
REXT  
A6280  
A6280  
VREG  
VREG  
Control Board  
Pixel Board #1  
Pixel Board #2  
Pixel Board #N  
Figure 1. Functional drawing of daisy chained display application. Additional pixel boards  
with A6280 ICs can be applied.  
A6280-DS, Rev. 7  

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