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A3968 PDF预览

A3968

更新时间: 2024-01-17 19:30:44
品牌 Logo 应用领域
急速微 - ALLEGRO 驱动器
页数 文件大小 规格书
8页 269K
描述
Dual Full-Bridge PWM Motor Driver

A3968 技术参数

是否无铅:含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP16,.4针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.36
Is Samacsys:N模拟集成电路 - 其他类型:STEPPER MOTOR CONTROLLER
JESD-30 代码:R-PDSO-G16JESD-609代码:e3
长度:10.3 mm功能数量:1
端子数量:16最高工作温度:85 °C
最低工作温度:-20 °C最大输出电流:0.75 A
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V认证状态:Not Qualified
座面最大高度:2.65 mm子类别:Motion Control Electronics
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:BIPOLAR温度等级:OTHER
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.5 mm
Base Number Matches:1

A3968 数据手册

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A3968  
Dual Full-Bridge PWM Motor Driver  
Features and Benefits  
±650 mA continuous output current  
30 V output voltage rating  
Internal fixed-frequency PWM current control  
Satlington® sink drivers  
Description  
TheA3968bidirectionallycontrolstwoDCmotors.Thedevice  
includestwofull-bridgescapableofcontinuousoutputcurrents  
of ±650 mA and operating voltages to 30 V. Motor winding  
current can be controlled by the internal fixed-frequency,  
pulse-width modulated (PWM), current-control circuitry. The  
peak load current limit is set by user selection of a reference  
voltage and current-sensing resistors.  
Brake mode  
User-selectable blanking window  
Internal ground-clamp and flyback diodes  
Internal thermal-shutdown circuitry  
The fixed-frequency pulse duration is set by a user-selected  
Crossover-current protection and UVLO protection  
external RC timing network. The capacitor in the RC timing  
networkalsodeterminesauser-selectableblankingwindowthat  
prevents false triggering of the PWM current-control circuitry  
during switching transitions.  
To reduce on-chip power dissipation, the full-bridge power  
outputs have been optimized for low saturation voltages. The  
sink drivers feature the Allegro® patented Satlington® output  
structure.TheSatlingtonoutputscombinethelowvoltagedrop  
of a saturated transistor and the high peak current capability  
of a Darlington.  
Package: 16 pin SOIC (suffix LB)  
Foreachbridge, theINPUTAandINPUTB terminalsdetermine  
theload-currentpolaritybyenablingtheappropriatesourceand  
sink driver pair. When a logic low is applied to both INPUTs  
Continued on the next page…  
Not to scale  
Typical Application  
MOTOR  
MOTOR  
2
1
16  
1
2
V
BB  
INPUT  
INPUT  
INPUT  
15  
14  
13  
12  
11  
1A  
2A  
INPUT  
3
4
1B  
2B  
LOGIC  
LOGIC  
0.5 Ω  
0.5 Ω  
5
6
+5 V  
+24 V  
V
BB  
+5 V  
7
8
V
10  
9
CC  
V
RC  
REF  
47 μF  
Dwg. EP-047-6  
29319.29G  

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