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A3949SLBTR-T PDF预览

A3949SLBTR-T

更新时间: 2024-01-17 15:51:09
品牌 Logo 应用领域
急速微 - ALLEGRO 驱动器运动控制电子器件信号电路光电二极管电动机控制
页数 文件大小 规格书
8页 227K
描述
DMOS Full-Bridge Motor Driver

A3949SLBTR-T 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:1.10 MM HEIGHT, LEAD FREE, MO-153ABT, TSSOP-16
针数:16Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.8模拟集成电路 - 其他类型:BRUSH DC MOTOR CONTROLLER
JESD-30 代码:R-PDSO-G16JESD-609代码:e3
长度:5 mm湿度敏感等级:1
功能数量:1端子数量:16
最高工作温度:85 °C最低工作温度:-20 °C
最大输出电流:2.8 A封装主体材料:PLASTIC/EPOXY
封装代码:HTSSOP封装等效代码:TSSOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, HEAT SINK/SLUG, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:8/36 V
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Motion Control Electronics最大供电电流 (Isup):8.5 mA
最大供电电压 (Vsup):36 V最小供电电压 (Vsup):8 V
表面贴装:YES技术:NMOS
温度等级:OTHER端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:4.4 mmBase Number Matches:1

A3949SLBTR-T 数据手册

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A3949  
DMOS Full-Bridge Motor Driver  
A3949SLB SOIC  
Designed for PWM (pulse width modulated) control of dc motors, the  
A3949 is capable of peak output currents to ±2.8 A and operating volt-  
ages to 36 V.  
N/C  
1
2
3
4
5
6
7
8
16 N/C  
MODE  
PHASE  
GND  
15 VREG  
14 VCP  
PHASE and ENABLE input terminals are provided for use in control-  
ling the speed and direction of a dc motor with externally applied PWM  
control signals. Internal synchronous rectication control circuitry is  
provided to reduce power dissipation during PWM operation.  
GND  
CP2  
13  
12  
11  
10  
9
SLEEP  
ENABLE  
OUTA  
CP1  
Scale 1:1  
OUTB  
VBB  
SENSE  
Internal circuit protection includes thermal shutdown with hysteresis,  
undervoltage monitoring of VBB and VCP , and crossover current protec-  
tion.  
A3949SLP TSSOP  
N/C  
MODE  
PHASE  
GND  
16  
15  
14  
13  
12  
11  
10  
9
The A3949 is supplied in a choice of two power packages, a 16-pin  
plastic SOIC with a copper batwing tab (part number sufx LB), and  
a low prole (1.1mm) 16-pin TSSOP (sufx LP) with exposed power  
tab. Both packages are available in a lead-free version (100% matte tin  
leadframe).  
1
2
3
4
5
6
7
8
N/C  
VREG  
VCP  
GND  
CP2  
SLEEP  
ENABLE  
CP1  
Scale 1:1  
OUTA  
OUTB  
VBB  
FEATURES  
SENSE  
Single supply operation  
Very small outline package  
Low RDS(ON) outputs  
Sleep function  
Internal UVLO  
ABSOLUTE MAXIMUM RATINGS  
Load Supply Voltage  
VBB...............................................................36 V  
BB (Peak < 2 μs)........................................38 V  
Crossover current protection  
Thermal shutdown protection  
V
Output Current, IOUT (Repetitive)1....................±2.8 A  
Sense Voltage, VSENSE .........................................0.5 V  
Logic Input Voltage, VIN ......................–0.3 V to 7 V  
Package Power Dissipation, PD  
Use the following complete part numbers when ordering:  
A3949SLB2 ......................................... 52ºC / W  
A3949SLP3.......................................... 34ºC / W  
Operating Temperature Range  
Part Number  
A3949SLB-T  
Pb-free*  
Yes  
Package  
Packing  
16-pin, SOIC  
16-pin, SOIC  
16-pin, TSSOP  
16-pin, TSSOP  
47 per tube  
1000 per reel  
96 per tube  
4000 per reel  
A3949SLBTR-T  
A3949SLP-T  
Yes  
Ambient Temperature, TA ............–20°C to +85°C  
Junction Temperature, TJ .................+150°C Max.  
Storage Temperature, TS...........–55°C to +150°C  
Yes  
A3949SLPTR-T  
Yes  
1Output current rating may be limited by duty cycle,  
ambient temperature, and heat sinking. Under any set of  
conditions, DO NOT exceed the specied IOUT or TJ.  
2Measured on a typical two-sided PCB with 2 in.2 copper  
ground plane.  
*Pb-based variants are being phased out of the product line. The variants cited  
in this footnote are in production but have been determined to be LAST TIME  
BUY. This classication indicates that sale of this device is currently restricted  
to existing customer applications. The variants should not be purchased for  
new design applications because obsolescence in the near future is probable.  
Samples are no longer available. Status change: October 31, 2006. Deadline  
for receipt of LAST TIME BUY orders: April 27, 2007. These variants include:  
A3949SLB, A3949SLBTR, A3949SLP, and A3949SLPTR.  
3Measured on a JEDEC-standard "High-K" 4-layer PCB.  

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